Multilayer Dielectric Stack for Stable Low-Capacitance Top-Vias
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Solution Overview
Problem
As interconnect pitches in semiconductor devices are scaled below 30 nanometers, RIE-induced damage to via and trench dielectrics increases capacitance, leading to performance and reliability issues, and existing solutions that form pillars to avoid RIE damage result in free-standing metal lines prone to collapse.
Innovation Solution
A BEOL component is formed with a substrate, a first dielectric layer, an etch stop layer, and a second dielectric layer, where a first metal layer is embedded within the first dielectric layer for mechanical anchoring, and a second metal layer forms projections extending above the etch stop layer, surrounded by a second dielectric layer for improved stability and reduced capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If RIE is used to form vias and trenches in dielectric layers, then manufacturing precision is improved, but capacitance increases due to dielectric damage
Solution Approach 1:
The patent segments the metal interconnect structure into multiple layers (first metal layer embedded in first dielectric layer, second metal layer forming projections above etch stop layer). This segmentation allows the via structures to be mechanically supported by the embedded first metal layer while maintaining low capacitance by avoiding RIE damage to the second dielectric layer surrounding the projections.
Solution Approach 2:
The etch stop layer acts as an intermediary between the first and second dielectric layers. It provides a stable interface that prevents RIE-induced damage from propagating into the second dielectric layer, thereby maintaining low capacitance while still allowing precise via formation through the first dielectric layer.
2Object-generated harmful factors
If pillars are formed to avoid RIE damage, then capacitance is reduced, but metal lines become free-standing and prone to collapse
Solution Approach 1:
The metal interconnect is segmented into two functional parts: the first metal layer embedded in the first dielectric layer provides mechanical anchoring and stability, while the second metal layer forms projections above the etch stop layer that are surrounded by the second dielectric layer, reducing capacitance without being free-standing.
Solution Approach 2:
The first metal layer is nested within the first dielectric layer, providing mechanical support. The second metal layer projections are nested within the second dielectric layer surrounding them, creating a stable configuration that avoids free-standing metal while maintaining low capacitance.
Data Source
AI summary
A back-end-of-line (BEOL) component includes a substrate and a first layer of dielectric material arranged on the substrate. The first layer of dielectric material includes openings. The BEOL component further includes a first layer of metal material arranged in the openings. The BEOL component further includes an etch stop layer arranged on top of the first layer of dielectric material. The BEOL component further includes a second layer of metal material in direct contact with the first layer of metal material. The second layer of metal material includes at least one projection extending above the etch stop layer. The BEOL component further includes a second layer of dielectric material arranged on top of the etch stop layer and surrounding the at least one projection.