Multilayer Substrate With Embedded Conductive Posts
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Solution Overview
Problem
The challenge in semiconductor device packaging is to develop a substrate with a thin profile, suitable for mass production, and high production yield, while minimizing complexity and cost, particularly as chip packages shrink and require more closely spaced electrical connections.
Innovation Solution
A multilayer substrate design featuring a first and second outer conductive patterned layer, insulating layers, and multiple inner layers with conductive posts and dielectric layers, where the inner conductive posts are embedded in dielectric material and aligned vertically, eliminating the need for vias and simplifying the manufacturing process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple metal layers are used with traces and vias for electrical connections, then electrical connectivity is improved, but manufacturing complexity and cost increase
Solution Approach 1:
The patent removes the via structure from the conventional multilayer substrate design. Instead of creating holes through the substrate to connect metal layers, the invention uses conductive posts that are integrated into the dielectric layers, eliminating the need for via formation processes such as drilling, plugging, and reflow.
Solution Approach 2:
The substrate is divided into multiple dielectric layers, each containing conductive posts and traces. This segmentation allows each layer to be manufactured and processed independently, with connections established through aligned conductive posts between layers, simplifying the overall manufacturing process.
2Volume of moving object
If chip package size is reduced, then compactness is improved, but trace and via spacing decreases increasing manufacturing complexity
Solution Approach 1:
The patent transitions from planar trace routing to three-dimensional routing using conductive posts that extend vertically between dielectric layers. This dimensional change allows electrical connections to be made in the vertical dimension rather than requiring longer horizontal traces, enabling compact package designs without increasing manufacturing complexity.
3Reliability
If conventional multilayer substrate manufacturing is used, then electrical connectivity is achieved, but production yield and manufacturing efficiency decrease
Solution Approach 1:
Conductive posts are formed within the dielectric layers during the lamination process, before final substrate assembly. This preliminary formation of conductive pathways eliminates the need for subsequent via formation and plugging steps, streamlining the manufacturing process and improving production yield.
Data Source
AI summary
A multilayer substrate includes a first outer conductive patterned layer, a first insulating layer exposing a portion of the first outer conductive patterned layer to define a first set of pads, a second outer conductive patterned layer, and a second insulating layer exposing a portion of the second outer conductive patterned layer to define a second set of pads. The multilayer substrate further includes inner layers each with an inner conductive patterned layer, multiple inner conductive posts formed adjacent to the inner conductive patterned layer, and an inner dielectric layer, where the inner conductive patterned layer and the inner conductive posts are embedded in the inner dielectric layer, and a top surface of each of the inner conductive posts is exposed from the inner dielectric layer.