Multilayer Wiring Substrate for Dense Interconnect Warpage Control
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Solution Overview
Problem
There is a need to improve the connection reliability between wiring substrates and electronic components, such as semiconductor chips, particularly in high-density wiring structures where thermal expansion mismatch can lead to warping and reliability issues.
Innovation Solution
A wiring substrate design with a core substrate and multiple wiring structures, where the second wiring structure has a higher thermal expansion coefficient than the first and insulating layers, and the insulating layers in the second structure have a lower thermal expansion coefficient than the core substrate, thereby aligning thermal expansion coefficients to reduce warping and enhance reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a high-density wiring structure is implemented with multiple insulating layers, then wiring density is improved, but thermal expansion mismatch causes warping and reduces connection reliability
Solution Approach 1:
The patent applies parameter changes by carefully selecting materials with specific thermal expansion coefficients for each insulating layer. The first insulating layer has a thermal expansion coefficient higher than the core substrate, while the second insulating layer has a thermal expansion coefficient lower than the core substrate. This parameter optimization compensates for thermal stress and prevents warping in high-density wiring structures.
Solution Approach 2:
The patent uses composite materials by combining different insulating layers with distinct thermal expansion properties. The first insulating layer (with higher thermal expansion coefficient) and second insulating layer (with lower thermal expansion coefficient) form a composite structure that balances thermal stress, allowing high-density wiring to be implemented without compromising connection reliability.
2Stability of the object's composition
If insulating layers with different thermal expansion coefficients are stacked, then warping is restricted, but manufacturing complexity increases
Solution Approach 1:
The patent manages manufacturing complexity by optimizing material selection parameters. Although multiple insulating layers with different thermal expansion coefficients are used, the process leverages standard PCB manufacturing techniques such as lamination and curing, making the multi-layer structure feasible with existing manufacturing capabilities.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The designed wiring substrate effectively restricts warping and enhances connection reliability by matching thermal expansion coefficients, ensuring stable integration of semiconductor chips and improved electrical connectivity.
Implementation Method 1
The multiple second insulating layers have a thermal expansion coefficient higher than a thermal expansion coefficient of the core substrate and lower than a thermal expansion coefficient of the one or more first insulating layers
Data Source
AI summary
A wiring substrate includes a core substrate, a first wiring structure located on an upper surface of the core substrate, and a second wiring structure located on an upper surface of the first wiring structure. The first wiring structure includes a structure in which one or more first wiring layers and one or more first insulating layers are stacked. The second wiring structure includes a structure in which multiple second wiring layers and multiple second insulating layers are stacked. The second wiring structure has a higher wiring density than the first wiring structure. The second insulating layer has a thermal expansion coefficient higher than that of the core substrate and lower than that of the first insulating layer.