Multilayer Wiring Substrate Layout for Low-Capacitance Signal Pads

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

In high-speed signal transmission through package substrates to integrated circuit dies, impedance characteristics are compromised due to capacitive coupling between ball landing pads and ground planes, leading to signal reflection, increased insertion loss, and deteriorated signal quality. Additionally, anti-pad structures to reduce capacitance can result in voids and cracks in dielectric layers, reducing reliability.

Innovation Solution

A multilayer wiring substrate with insulating layers and circuit layers stacked sequentially, featuring lower substrate pads with a signal ball landing pad. The substrate includes ground conductive layers with openings over the signal ball landing pad and signal patterns within these openings, electrically connected to the signal ball landing pad, ensuring that the signal patterns overlap at least 80% of the signal ball landing pad.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If an anti-pad structure is provided by removing a portion of the ground wiring on the ball landing pad, then capacitance between the ball landing pad and the ground wiring is reduced, but voids are generated in the dielectric layer and cracks may progress to damage traces, reducing reliability

Engineering Contradiction:
Improvesignal transmission reliabilityVSAvoidcapacitive coupling effect
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The ground conductive layer is extracted (removed) from the region directly above the signal ball landing pad by providing an opening in the ground conductive layer. This extraction eliminates the capacitive coupling between the ground layer and the signal ball landing pad, thereby improving signal transmission characteristics without creating voids in the dielectric layer

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The solution transitions from a two-dimensional planar ground layer to a three-dimensional structured approach by creating an opening in the ground conductive layer. This dimensional change allows the signal pattern to be positioned within the opening, maintaining electrical connection while eliminating harmful capacitive coupling in the vertical dimension

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Object-affected harmful factors

If the ground conductive layer is removed completely, then capacitance is reduced, but the structural integrity and electrical connection of the dielectric layer may be compromised

Engineering Contradiction:
Improvecapacitance between ball landing pad and groundVSAvoiddielectric layer integrity
Core Design Contradiction:
Object-affected harmful factorsVSReliability

Solution Approach 1:

The ground conductive layer is selectively removed only in the region corresponding to the signal ball landing pad by providing a localized opening. The ground conductive layer is maintained in other regions, preserving the overall structural integrity and electrical connection of the dielectric layer while reducing capacitance only where necessary for signal transmission

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration improves signal transmission characteristics by reducing capacitance between the signal ball landing pad and ground conductive layers, preventing voids in the dielectric layer, and enhancing the reliability of the semiconductor package.

Implementation Method 1

capacitance between the signal ball landing pad and ground conductive layers

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS20250193997A1Multilayer wiring substrate and semiconductor package including the multilayer wiring substrate
Publication Date: 2025.06.12 SAMSUNG ELECTRONICS CO LTD
  • US20250193997A1 patent drawing
  • US20250193997A1 patent drawing
  • US20250193997A1 patent drawing

AI summary

A multilayer wiring substrate includes insulating layers sequentially stacked on each other, each having an upper surface and a lower surface opposite to the upper surface, circuit layers sequentially stacked and respectively provided in the insulating layers, and each having wirings, and lower substrate pads included in the bottommost circuit layer and exposed from the lower surface of the insulating layers, each of the lower substrate pads being electrically connected to the wirings of a circuit layer above the lower substrate pad, the lower substrate pads including a signal ball landing pad. At least one circuit layer includes a ground conductive layer at a higher vertical level than the signal ball landing pad and having an opening in a region corresponding to the signal ball landing pad, and a signal pattern within the opening and electrically connected to the signal ball landing pad.