Multi-Layer Substrate Stray Inductance Reduction
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Solution Overview
Problem
Existing power module designs for electrified vehicles face challenges in minimizing stray inductance and associated voltage overshoot and power loss, particularly in Silicon Carbide (SiC) based systems which switch faster than Silicon (Si) based devices, due to lengthy power loops in traditional substrates.
Innovation Solution
A power system utilizing a contiguous five-layer substrate with two insulative layers interleaved with three conductive layers, where the center conductive layer is partitioned to define discrete terminal portions, and semiconductors are directly in contact with specific terminal portions without contacting other layers, reducing main loop stray inductance through laminated terminal configurations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional substrate designs are used, then manufacturing is simpler, but stray inductance and voltage overshoot increase
Solution Approach 1:
The substrate is segmented into multiple conductive layers (first, second, and third conductive layers) with the center conductive layer being partitioned into separate terminal portions. This segmentation allows for optimized current paths and reduced stray inductance by distributing electrical connections across multiple layers rather than using a single-plane substrate design.
Solution Approach 2:
The patent transitions from a traditional single-plane substrate to a multi-layer stacked substrate configuration. By adding the vertical dimension with multiple conductive layers interleaved with insulative layers, the design achieves shorter current loops and reduced parasitic inductance while maintaining a compact footprint.
2Productivity
If SiC-based fast-switching devices are used, then power conversion efficiency improves, but voltage overshoot and power loss increase due to lengthy power loops
Solution Approach 1:
The patent merges multiple conductive layers into a unified multi-layer substrate structure where the first, second, and third conductive layers work together to create optimized current paths. The partitioning of the center conductive layer into terminal portions that overlap with outer layer terminals creates integrated connection points that minimize loop areas and reduce resistive losses.
Solution Approach 2:
The design creates multiple copies of terminal connections across different layers. The center conductive layer is partitioned to define positive and output terminal portions that overlap with corresponding terminals on outer layers, providing multiple parallel current paths that reduce the effective loop length and associated power losses.
3Strength
If semiconductors are in direct contact with multiple layers, then electrical connections are more robust, but stray inductance increases
Solution Approach 1:
The patent applies local quality by allowing semiconductors to be in direct contact only with specific terminal portions of the center conductive layer, rather than with all layers. This localized contact approach provides sufficient electrical connection strength at the critical terminal points while avoiding the creation of large current loops that would increase stray inductance.
Data Source
AI summary
A power system has a single-side-cooled power module including a contiguous five-layer substrate of two insulative layers interleaved with three conductive layers. A center one of the conductive layers is partitioned to define discrete spaced apart positive terminal and output terminal portions, and an outer of the conductive layers defines a negative terminal portion such that the positive terminal and negative terminal portions overlap. The power system also has semiconductors respectively in direct contact with the positive terminal and output terminal portions without directly contacting the other layers.