Multi-Layer TFT Contacts for Sub-10 Nm Leakage Control
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Solution Overview
Problem
Conventional thin-film transistor (TFT) fabrication processes face limitations in scaling to sub-10 nm technology nodes due to variability and inefficiencies in sub threshold swing, which affect the ability to turn off the transistor at low leakage values, particularly in bulk silicon substrates.
Innovation Solution
The implementation of multi-layer contact metallization in thin film transistors, including a semiconductor material layer, a conductive liner, and a conductive fill, along with a high-k gate dielectric layer, enhances channel control and stability by increasing the transistor channel length in a non-planar configuration, suitable for back-end-of-line (BEOL) integration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If conventional single-layer contact metallization is used in TFT fabrication, then the manufacturing process is simpler, but gate control and channel stability deteriorate at sub-10 nm technology nodes
Solution Approach 1:
The contact metallization is divided into multiple functional layers: a first contact layer (e.g., TiN) providing gate control and a second contact layer (e.g., W or Cu) providing low-resistance electrical connection. This segmentation allows each layer to optimize its function, resolving the contradiction between structural simplicity and gate control reliability.
Solution Approach 2:
The patent employs composite contact metallization structures combining different materials with complementary properties. The first contact layer material is selected for its gate control characteristics, while the second contact layer material is selected for its electrical conductivity, creating a composite structure that achieves both gate control and low resistance simultaneously.
2Productivity
If transistor size is scaled down to increase device density, then more devices fit on chip, but sub threshold swing performance deteriorates causing higher leakage
Solution Approach 1:
The patent modifies the electrical parameters of the contact structure by introducing multi-layer metallization with different work functions and resistance characteristics. This changes the overall electrical behavior of the transistor, enabling better sub threshold swing performance and leakage control even at scaled dimensions.
Solution Approach 2:
The first contact layer acts as an intermediary between the gate and the second contact layer, providing gate control functionality that mediates the electrical characteristics. This intermediary layer enables the transistor to maintain proper sub threshold swing performance while allowing the second layer to provide low-resistance connection for high current drive.
3Reliability
If multi-layer contact metallization is implemented to improve gate control, then channel stability improves, but manufacturing complexity increases
Solution Approach 1:
The contact metallization is divided into multiple functional layers: a first contact layer (e.g., TiN) providing gate control and a second contact layer (e.g., W or Cu) providing low-resistance electrical connection. This segmentation allows each layer to optimize its function, resolving the contradiction between structural simplicity and gate control reliability.
Solution Approach 2:
The patent employs composite contact metallization structures combining different materials with complementary properties. The first contact layer material is selected for its gate control characteristics, while the second contact layer material is selected for its electrical conductivity, creating a composite structure that achieves both gate control and low resistance simultaneously.
Data Source
AI summary
Thin film transistors are described. An integrated circuit structure includes a gate electrode. A gate dielectric layer is on the gate electrode. A channel material layer is on the gate dielectric layer. A dielectric layer is over the channel material layer. Source or drain contacts are on the channel material layer. Each of the source or drain contacts includes a semiconductor material layer, a conductive liner on and within the semiconductor material layer, and a conductive fill on the conductive liner, where one, two or all three of the semiconductor material layer, the conductive liner, or the conductive fill has an uppermost surface at a same level as an uppermost surface of the dielectric layer.


