Multi-layer Thick Metallization for IC Signal Distribution
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Solution Overview
Problem
The existing thick metal process flow for integrated circuit metallization is impractical for high-volume manufacturing due to wafer bow issues and maximum process temperature restrictions, making it difficult to add a second thick metal layer for increased signal connections in microprocessors.
Innovation Solution
A multi-layer thick metallization structure combining a patterned sputtered metal layer for global signal distribution and a plated metal layer for on-die power distribution, which avoids wafer bow and low-temperature passivation problems, using a combination of barrier layers, metal layers, and passivation layers with nitride for stress buffering and adhesion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If an additional thick metal layer is fabricated using the existing thick metal layer process flow, then the number of signal connections in the middle of the die increases, but wafer bow issues and maximum process temperature restrictions make the process unworkable for high volume manufacturing
Solution Approach 1:
The patent divides the thick metal layer fabrication into two separate layers: a first thick metal layer and a second thick metal layer. This segmentation allows each layer to be formed using optimized process flows that avoid wafer bow issues and temperature restrictions, making high-volume manufacturing feasible while still providing increased signal connections in the middle of the die
Solution Approach 2:
The patent transitions from a single-plane thick metal layer to a multi-layer vertical structure. By stacking multiple thick metal layers at different vertical levels within the metallization stack, the design provides additional signal connection capacity in the middle of the die without requiring larger die area, thus resolving the contradiction between connection density and manufacturability
2Productivity
If the existing thick metal layer process flow is used for high volume manufacturing, then production efficiency is maintained, but wafer bow issues and temperature restrictions prevent successful fabrication
Solution Approach 1:
The patent changes the process parameters by forming the first and second thick metal layers using different fabrication approaches. The first thick metal layer is formed at lower temperatures without causing wafer bow, while the second thick metal layer is formed using a modified process that avoids the temperature and wafer bow restrictions, thereby ensuring process success while maintaining high-volume manufacturing capability
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables the successful fabrication of a second thick metal layer at lower costs and provides better low-k inter-layer dielectric protection, addressing the limitations of the existing process flow while maintaining effective signal distribution and power delivery.
Implementation Method 1
a patterned sputtered metal layer
Implementation Method 2
a plated metal layer
Implementation Method 3
passivation layers with nitride for stress buffering and adhesion
Implementation Method 4
passivation layers with nitride for stress buffering and adhesion
Data Source
AI summary
A multi-layer thick metallization structure for a microelectronic device includes a first barrier layer (111), a first metal layer (112) over the first barrier layer, a first passivation layer (113) over the first metal layer, a via structure (114) extending through the first passivation layer, a second barrier layer (115) over the first passivation layer and in the via structure, a second metal layer (116) over the second barrier layer, and a second passivation layer (117) over the second metal layer and the first passivation layer.