Multilayer Deep Trench Isolation to Eliminate SOI Void Formation
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Solution Overview
Problem
Existing isolation structures in semiconductor-on-insulator (SOI) substrates, such as shallow and deep trench isolation structures, fail to adequately address crosstalk issues and void formation in polysilicon isolation structures, leading to increased resistance and reduced reliability of integrated circuit devices.
Innovation Solution
Implementing a silicon-comprising deep trench isolation structure formed through a selective, bottom-up deposition process that uses silicon selective epitaxial growth to fill isolation trenches without voids, combined with a non-selective deposition of polysilicon to cover the trench top, thereby minimizing resistance and outgassing issues.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If polysilicon isolation structures are used to fill isolation trenches, then isolation between IC devices is improved, but voids form in the structure leading to increased resistance
Solution Approach 1:
The patent changes the material parameter from polysilicon to silicon, exploiting the different deposition characteristics of silicon through selective epitaxial growth. This parameter change eliminates void formation while maintaining isolation effectiveness, as silicon deposits uniformly without the voiding issues that plague polysilicon isolation structures.
Solution Approach 2:
The patent replaces the conventional polysilicon deposition process with a silicon selective epitaxial growth process. This substitution fundamentally changes the deposition mechanism from physical vapor deposition or chemical vapor deposition of polysilicon to biologically-inspired selective silicon growth, which inherently fills trenches without voids and provides superior structural integrity.
2Manufacturing precision
If dopants are introduced into polysilicon isolation structures to reduce resistance, then electrical resistance is reduced, but dopant outgassing occurs reducing device reliability
Solution Approach 1:
The patent extracts the dopant outgassing problem by eliminating the polysilicon matrix that causes it. By using pure silicon isolation structures instead of doped polysilicon, the patent removes the source of dopant outgassing while still achieving resistance control through alternative means such as intrinsic silicon conductivity or controlled doping without the outgassing issue.
Solution Approach 2:
The patent replaces the problematic doped polysilicon structure with a simpler silicon-based structure that does not require heavy doping. This substitution eliminates the need for dopant introduction and the associated outgassing problems, achieving resistance control through the inherent properties of the silicon structure rather than through dopant addition.
3Reliability
If existing isolation structures are used in SOI substrates, then basic isolation is achieved, but crosstalk suppression is insufficient for advanced IC technologies
Solution Approach 1:
The patent employs composite material strategies by combining silicon selective epitaxial growth with subsequent polysilicon capping layers. This composite structure provides both the void-free isolation properties of silicon and the beneficial electrical characteristics of polysilicon, achieving superior crosstalk suppression while maintaining compatibility with advanced IC technology requirements.
Solution Approach 2:
The patent segments the isolation structure into multiple functional layers: a silicon base layer formed by selective epitaxial growth for void-free isolation, and an overlying polysilicon layer for additional electrical isolation and process compatibility. This segmentation allows each layer to perform its specialized function, achieving comprehensive crosstalk suppression that meets advanced IC technology demands.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The silicon-comprising deep trench isolation structure effectively reduces resistance and enhances device reliability by eliminating voids and minimizing dopant outgassing, improving the performance of integrated circuit devices.
Implementation Method 1
a silicon-comprising deep trench isolation structure formed through a selective, bottom-up deposition process that uses silicon selective epitaxial growth to fill isolation trenches without voids
Implementation Method 2
combined with a non-selective deposition of polysilicon to cover the trench top
Data Source
AI summary
Deep trench isolation structures for high voltage semiconductor-on-insulator devices are disclosed herein. An exemplary deep trench isolation structure surrounds an active region of a semiconductor-on-insulator substrate. The deep trench isolation structure includes a first insulator sidewall spacer, a second insulator sidewall spacer, and a multilayer silicon-comprising isolation structure disposed between the first insulator sidewall spacer and the second insulator sidewall spacer. The multilayer silicon-comprising isolation structure includes a top polysilicon portion disposed over a bottom silicon portion. The bottom polysilicon portion is formed by a selective deposition process, while the top polysilicon portion is formed by a non-selective deposition process. In some embodiments, the bottom silicon portion is doped with boron.