Multi-Layer Tunnel Insulating Structure for Non-Volatile Memory

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Solution Overview

Problem

Existing nonvolatile flash memory devices, particularly TANOS flash memory devices, face limitations in achieving a wide threshold voltage window necessary for multi-level cell technology due to the high permittivity of aluminum oxide used as a blocking insulating layer, which restricts their ability to store multi-bit data effectively.

Innovation Solution

A nonvolatile memory device with a multi-layer tunnel insulating structure is introduced, where the second tunnel insulating layer has a larger band gap and higher permittivity than the first tunnel insulating layer, allowing for an increased threshold voltage window while maintaining constant program and erase voltages.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If aluminum oxide layer is used as blocking insulating layer, then device reliability is improved, but threshold voltage window is reduced

Engineering Contradiction:
Improvedevice reliabilityVSAvoidthreshold voltage window
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The tunnel insulating layer is divided into multiple layers (first tunnel insulating layer and second tunnel insulating layer) with different band gaps. The first layer has a smaller band gap and the second layer has a larger band gap, allowing each layer to contribute differently to charge tunneling and threshold voltage formation, thereby increasing the overall threshold voltage window while maintaining reliability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the tunnel insulating layer are assigned different material properties (band gap values). The first tunnel insulating layer uses a material with smaller band gap to facilitate charge tunneling, while the second layer uses a material with larger band gap to provide better blocking capability, optimizing both tunneling efficiency and threshold voltage window locally.

Inventive Principle:
Principle #3Local quality

2Quantity of substance

If capacitance of blocking insulating layer is increased, then charge quantity is improved, but threshold voltage window is reduced

Engineering Contradiction:
Improvecharge quantityVSAvoidthreshold voltage window
Core Design Contradiction:
Quantity of substanceVSObject-affected harmful factors

Solution Approach 1:

The tunnel insulating layer is segmented into multiple layers with different band gap characteristics. This segmentation allows the system to achieve adequate charge storage capacity through the combined effect of multiple layers while the larger band gap of the second layer compensates for the capacitance increase, maintaining a sufficient threshold voltage window.

Inventive Principle:
Principle #1Segmentation

3Productivity

If multi-level cell technology is implemented, then integration is improved, but threshold voltage window requirement increases

Engineering Contradiction:
ImproveintegrationVSAvoidthreshold voltage window
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

The tunnel insulating layer is divided into multiple layers with progressively larger band gaps from bottom to top. This segmented structure creates distinct energy barriers that can accommodate multiple charge storage levels, enabling multi-level cell technology where each cell can store multiple bits of data by utilizing different threshold voltage levels within the expanded window.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The band gap parameter of the tunnel insulating layer is changed by using different materials for different layers. The second tunnel insulating layer uses a material with a larger band gap than the first layer, which fundamentally changes the energy barrier characteristics and enables a wider threshold voltage window necessary for multi-level cell operation.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enhances the threshold voltage window, enabling more efficient data storage and improved device reliability by reducing the hole tunneling current and maintaining the charge quantity in the charge storage layer, thus supporting multi-level cell technology.

Implementation Method 1

The second tunnel insulating layer may have a larger band gap than the first tunnel insulating layer

Methodology Applied
Scientific EffectBand gap:

Implementation Method 2

Charges causing a threshold voltage difference may be charged/discharged into/from the charge storage layer, and/or the charge/discharge operation may be performed using a charge tunneling phenomenon in the tunnel insulating layer

Methodology Applied
Scientific EffectCharge tunneling:

Data Source

PatentUS8460999B2Non-volatile memory devices with multiple layers having band gap relationships among the layers
Publication Date: 2013.06.11 SAMSUNG ELECTRONICS CO LTD
  • US8460999B2 patent drawing
  • US8460999B2 patent drawing
  • US8460999B2 patent drawing

AI summary

A nonvolatile memory device may include: a tunnel insulating layer on a semiconductor substrate; a charge storage layer on the tunnel insulating layer; a blocking insulating layer on the charge storage layer; and a control gate electrode on the blocking insulating layer. The tunnel insulating layer may include a first tunnel insulating layer and a second tunnel insulating layer. The first tunnel insulating layer and the second tunnel insulating layer may be sequentially stacked on the semiconductor substrate. The second tunnel insulating layer may have a larger band gap than the first tunnel insulating layer. A method for fabricating a nonvolatile memory device may include: forming a tunnel insulating layer on a semiconductor substrate; forming a charge storage layer on the tunnel insulating layer; forming a blocking insulating layer on the charge storage layer; and forming a control gate electrode on the blocking insulating layer.