Multilayer VCSEL Interconnects for Dense Structured Light Arrays

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The complex electrical interconnection of large, addressable light emitter arrays, such as VCSELs, becomes challenging when VCSEL elements are interspersed among each other, limiting the density and layout of high-density illumination patterns required for applications like 3D imaging and sensing.

Innovation Solution

A multilayer conductor interconnect structure is employed, where each conductor layer is isolated by a dielectric layer, allowing conductors to cross over each other and be placed on top of one another, enabling flexible and complex connections to peripheral contact pads, thereby increasing interconnect density and flexibility.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If a single layer of conductor patterns is used to connect VCSEL elements, then the fabrication process is simpler, but the interconnect density and flexibility are insufficient for high-density arrays with interspersed elements

Engineering Contradiction:
Improvefabrication simplicityVSAvoidinterconnect density
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The patent transitions from a two-dimensional single-layer conductor layout to a three-dimensional multilayer conductor structure. By stacking multiple conductor layers vertically with dielectric insulation between them, the system achieves higher interconnect density and routing flexibility while maintaining fabrication feasibility through standardized semiconductor manufacturing processes.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent implements nested conductor layers where multiple conductor patterns are stacked vertically within the same lateral footprint. Each conductor layer is embedded within dielectric layers, creating a nested structure that allows multiple independent electrical connections to occupy the same planar space, thereby increasing interconnect density without expanding the device area.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Device complexity

If multiple conductor layers are stacked to increase interconnect density, then the connection flexibility for interspersed VCSELs improves, but the fabrication complexity increases

Engineering Contradiction:
Improveinterconnect flexibilityVSAvoidfabrication complexity
Core Design Contradiction:
Device complexityVSEase of manufacture

Solution Approach 1:

The patent segments the conductor interconnect function into multiple independent layers, each responsible for connecting specific subsets of VCSEL elements. This segmentation allows each layer to be optimized for particular routing requirements while simplifying the overall design by dividing the complex interconnection task into manageable discrete layers that can be fabricated using standard sequential deposition and patterning processes.

Inventive Principle:
Principle #1Segmentation

3Device complexity

If conductors are routed between interspersed VCSELs in a single layer, then the lateral routing flexibility is limited, but adding multiple layers increases the device area

Engineering Contradiction:
Improverouting flexibilityVSAvoiddevice area
Core Design Contradiction:
Device complexityVSArea of stationary object

Solution Approach 1:

The patent resolves the area-routing flexibility trade-off by moving conductor routing into the vertical dimension. Multiple conductor layers stacked vertically provide extensive routing flexibility for connecting interspersed VCSELs without requiring additional lateral space, as each layer utilizes the same footprint area through vertical stacking with dielectric insulation.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentEP3673545B1Multilayer conductor interconnects for high density light emitter arrays
Publication Date: 2024.01.03 AMS OSRAM INT GMBH
  • EP3673545B1 patent drawingFigure 1
  • EP3673545B1 patent drawingFigure 2
  • EP3673545B1 patent drawingFigure 3

AI summary

A multilayer interconnect is described which enables electrically connecting a complex distribution of VCSEL or other light emitter elements in a large high density addressable array. The arrays can include many groups of VCSEL elements interspersed among each other to form a structured array. Each group can be connected to a contact pad so that each group of light emitter elements can be activated separately.