Multilayer Electronic Structures with Varying Via Dimensions
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Solution Overview
Problem
The existing 'drill & fill' technology for creating vias in IC substrates and interposers is limited by low throughput, high costs, difficulty in producing high-density vias of different sizes and shapes, rough side walls, tapering, and reliability issues due to laser drilling and copper electroplating, which restricts the range of via sizes and geometries, especially in composite dielectric materials.
Innovation Solution
The use of pattern plating and panel plating methodologies, where copper or other metals are deposited into photo-resist patterns, creating via posts that are then laminated with a dielectric material, allowing for the fabrication of multilayer structures with vias of varying dimensions and shapes, including non-circular and asymmetrical designs, without the limitations of laser drilling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If laser drilling is used to create vias, then via channels can be formed through dielectric material, but the side walls become rough and tapered, reducing effective diameter and electrical reliability
Solution Approach 1:
The patent replaces the mechanical laser drilling process with a chemical etching process using patterned photoresist masks. This substitution eliminates the mechanical ablation that causes rough walls and tapering, producing vias with smooth, vertical side walls and precise dimensional control.
Solution Approach 2:
The patent introduces photoresist patterns as an intermediary tool to define via locations and dimensions before etching. This intermediary layer enables precise control over via geometry and allows different via sizes and shapes to be created through pattern design, rather than direct mechanical drilling.
2Reliability
If drill & fill technology is used to create multiple vias, then electrical connections can be established, but throughput rate is limited and manufacturing costs become prohibitive
Solution Approach 1:
The patent merges multiple individual via drilling operations into a single batch photoresist patterning and etching process. Multiple vias of different sizes and shapes are created simultaneously in one工艺流程, dramatically increasing throughput while maintaining electrical connection quality through controlled copper electroplating.
Solution Approach 2:
The patent performs preliminary photoresist patterning to predefine all via locations, dimensions, and shapes before the etching step. This preliminary action enables subsequent batch processing of multiple vias without individual drilling operations, thereby increasing manufacturing throughput.
3Adaptability or versatility
If different sized via channels are drilled and filled with metal, then various via dimensions can be achieved, but dimpling or overfill occurs as filling rates differ
Solution Approach 1:
The patent applies local quality by using photoresist patterns with different thicknesses or etch resistances in different regions to control etching rates locally. This enables different via sizes and shapes to be created with uniform wall quality and consistent copper fill characteristics, preventing dimpling or overfill issues.
4Ease of manufacture
If laser drilling creates via channels in composite dielectric materials, then connections can be made, but via diameter is limited to approximately 60 micrometers due to tapering and roughness
Solution Approach 1:
The patent replaces mechanical laser drilling with chemical etching, which is not constrained by the same physical limitations. This substitution enables creation of vias with diameters significantly smaller than 60 micrometers while maintaining smooth walls and precise dimensional control through photoresist pattern geometry.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the cost-effective fabrication of a wide range of via shapes and sizes in the same layer, improving reliability and reducing dimpling and overfill issues, allowing for higher density and smaller via diameters, such as 30 microns or less, with smoother walls and reduced stray inductances, facilitating the creation of complex interconnect structures.
Implementation Method 1
a first layer of photoresist is applied over the seed layer, the first layer of photoresist is exposed and developed to form a negative pattern of features
Implementation Method 2
a first layer of metal, typically copper, is deposited over the seed layer, a second layer of metal, typically copper, is deposited over the first layer of metal
Data Source
AI summary
A multilayer composite electronic structure comprising at least two feature layers extending in an X-Y plane and separated by a via layer comprising a dielectric material that is sandwiched between two adjacent feature layers, the via layer comprising via posts that couple adjacent feature layers in a Z direction perpendicular to the X-Y plane, wherein a first via has different dimensions in the X-Y plane from a second via in the via layer.