Multilayer Wiring via Catalytic Colloidal Printing
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Solution Overview
Problem
Existing multilayer printed circuit board manufacturing processes face challenges such as environmental pollution, low yield, and high costs due to the use of chemical plating and lithographic processes, which also result in undercuts and integration difficulties between printing and lithographic processes.
Innovation Solution
A method involving the formation of a patterned colloidal layer with a polymer material and a first catalyzer on a substrate, followed by chemical plating to create a conductive layer, and an insulation colloidal layer with a second catalyzer, where laser drilling and electroless plating are used to form conductive vias without the need for lithographic processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If lithographic process is used to form conductive lines and vias, then manufacturing precision is improved, but environmental pollution increases and manufacturing costs increase
Solution Approach 1:
The patent replaces the lithographic process (which uses chemicals and light) with a printing process that deposits catalytic materials followed by electrochemical plating. This substitution eliminates the need for photoresist, developers, and etching chemicals, thereby reducing environmental pollution while maintaining the ability to form precise conductive structures through controlled catalytic reactions and electrochemical deposition.
2Manufacturing precision
If lithographic process is used to form conductive lines, then manufacturing precision is improved, but manufacturing yield decreases due to undercuts
Solution Approach 1:
The patent replaces the mechanical/chemical etching process with an electrochemical plating process guided by catalytic materials. The catalytic materials deposited during the printing process serve as templates for uniform electrochemical deposition, eliminating the undercut problem inherent in traditional etching methods where chemical reactions create inverted trapezoidal cross-sections. This results in straighter, more uniform conductive lines with higher manufacturing yield.
3Quantity of substance
If lithographic process is used for multilayer circuit board manufacturing, then wiring density is improved, but manufacturing costs increase
Solution Approach 1:
The patent merges the printing process and lithographic process into a single integrated manufacturing flow. The printing process deposits catalytic materials that directly guide subsequent electrochemical plating, eliminating the need for separate lithographic steps. This integration reduces the number of process steps, chemical materials required, and equipment needs, thereby lowering manufacturing costs while maintaining high wiring density capability.
4Adaptability or versatility
If printing process is performed before lithographic process, then manufacturing flexibility is improved, but process compatibility deteriorates due to polymer material interference
Solution Approach 1:
The patent extracts the catalytic material deposition step from the traditional printing-lithography sequence and integrates it directly into the printing process. By depositing catalytic materials during the printing stage and using them as templates for subsequent electrochemical plating, the process eliminates the need for separate lithographic steps. This extraction and integration resolve the compatibility issue by removing the polymer material interference problem while maintaining manufacturing flexibility.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method improves yield and reduces costs by eliminating undercuts and environmental pollution, while enabling the formation of high-density conductive layers and vias without the high-temperature processes associated with conventional methods, thus enhancing manufacturing efficiency and reducing expenses.
Implementation Method 1
the activated first catalyzer reacts with a chemical plating solution for forming a conductive layer on a surface of the patterned colloidal layer
Implementation Method 2
at least one opening is formed in the insulation colloidal layer by laser to expose the conductive layer and activate a portion of the second catalyzer
Implementation Method 3
an electroless plating process is performed on the activated second catalyzer to form the conductive via in the at least one opening
Data Source
AI summary
A manufacturing method of multilayer wiring is provided, wherein a multilayer wiring structure including a wiring layer and a conductive via is formed on a substrate. The wiring layer is formed by forming a patterned colloidal layer having a first catalyzer on the substrate, activating the first catalyzer, and forming a conductive layer on a surface of the patterned colloidal layer. The conductive via is formed by forming an insulation colloidal layer containing a second catalyzer on the substrate and the conductive layer and forming at least one opening in the colloidal insulation layer by laser to expose the conductive layer and activate a portion of the second catalyzer. Electroless plating is performed on the activated second catalyzer to form the conductive via in the opening. An interface is between the patterned colloidal layer and the conductive layer in the multilayer wiring structure.