Multi-Layer Wiring Structure for RC Delay Mitigation
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Solution Overview
Problem
As high-definition TFT-LCDs increase in size, the resistance capacitance (RC) delay phenomenon in wirings becomes a significant issue due to increased resistance, which is exacerbated by the growing number of pixels and TFTs, leading to inefficiencies in panel performance.
Innovation Solution
A method is developed to form wirings by creating a first wire on a substrate, followed by a material layer with a greater thickness, applying a surface treatment film with opposite physical properties, and then forming a second wire using inkjet printing conductive ink, where UV irradiation is used to expose and remove the surface treatment film selectively, thereby reducing wire resistance and mitigating RC delay.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the panel size and pixel count are increased to achieve higher definition, then the display resolution is improved, but the wiring resistance increases causing RC delay phenomenon
Solution Approach 1:
The patent transitions from a single-layer wiring structure to a multi-layer stacked wiring structure, adding the vertical dimension to the wiring architecture. Multiple wiring layers are formed at different heights on the substrate, connected through vertical vias, effectively increasing the total wiring thickness and reducing resistance without compromising the increased panel size and pixel count for high definition displays
Solution Approach 2:
The patent employs composite material structures by combining multiple wiring layers made of different materials (e.g., copper, aluminum, or transparent conductive oxides) with varying thicknesses. Each layer is optimized for specific electrical properties, and the composite structure achieves lower overall resistance compared to a single-layer wiring, thereby mitigating RC delay in large high-definition panels
2Reliability
If the wiring thickness is increased to reduce resistance, then the RC delay is mitigated, but the manufacturing process complexity increases
Solution Approach 1:
The patent divides the thick wiring structure into multiple thinner layers, each formed through separate deposition and patterning steps. This segmentation allows each layer to be manufactured with standard thin-film processes, avoiding the need for single-step thick-film deposition while achieving the cumulative thickness needed for low resistance. The layered approach simplifies the manufacturing of each individual layer compared to creating a monolithic thick wiring
Solution Approach 2:
The patent implements nested wiring structures where multiple wiring layers are stacked vertically, with each layer nested within the overall multi-layer architecture. Conductive vias penetrate through insulating layers to electrically connect the nested wiring layers, creating a compact three-dimensional wiring system that achieves high effective thickness while maintaining compatibility with standard semiconductor manufacturing processes
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively decreases wire resistance and mitigates the RC delay phenomenon, allowing for higher pixel integration and improved performance in display devices by increasing the total wire thickness and optimizing inkjet printing processes.
Implementation Method 1
removing the dried resultant product from the surface of the first wire may comprise irradiating UV rays on a remaining film, after drying the coated solution, until the first wire is exposed
Data Source
AI summary
A method of forming a wiring may include forming a first wire on a substrate; forming a material layer on the substrate, except on the first wire; forming a surface treatment film on the material layer; and forming a second wire on the first wire. The surface treatment film has physical properties opposite to the first wire. A method of forming a wiring may include forming a first wire on a substrate; forming a material layer on the substrate and the first wire; removing a portion of the material layer from the first wire; forming a surface treatment film on the material layer and the first wire; removing a portion of the surface treatment film from the first wire; and forming a second wire on the first wire. A thickness of the material layer on the substrate is greater than a thickness of the first wire on the substrate.