Multilayer Semiconductor Storage Structure with Word-Line Shields
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Solution Overview
Problem
Existing semiconductor storage devices with three-dimensionally disposed capacitors face challenges in reducing cell size and maintaining optimal electrical characteristics due to interference between word lines and semiconductor layers, leading to issues with on-current and off-leakage.
Innovation Solution
The semiconductor storage device employs a multi-layered structure with alternating first and second layers, where word lines are integrated with protruding portions covering the semiconductor layer from both sides, ensuring the semiconductor layer is shielded from adjacent word line potentials, and includes a bit line and body contact to minimize cell size and interference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If the cell size is reduced in existing semiconductor storage devices with three-dimensionally disposed capacitors, then the integration density increases, but the interference between word lines and semiconductor layers increases, leading to degraded electrical characteristics
Solution Approach 1:
The patent introduces protruding portions that extend in the third direction (vertical direction) from the word lines, creating a three-dimensional shielding structure. This dimensional extension allows the word lines to cover the semiconductor layer from multiple angles, effectively blocking interference paths without increasing the planar cell footprint, thus resolving the contradiction between cell size reduction and electrical characteristic maintenance
Solution Approach 2:
The protruding portions act as intermediary structures between the word lines and the semiconductor layer. These protruding portions made of conductive material serve as shielding mediators that intercept and redirect electromagnetic interference from word lines before they can affect the semiconductor layer, thereby protecting the electrical characteristics while allowing compact cell design
2Volume of moving object
If the word lines are positioned closer to the semiconductor layer to reduce cell size, then the integration density increases, but the interference between adjacent word lines and semiconductor layers increases, affecting on-current and off-leakage
Solution Approach 1:
The protruding portions are designed to extend from the word lines in advance toward the semiconductor layer, creating a preliminary shielding barrier before the interference can occur. This pre-positioned conductive structure actively counteracts the harmful electromagnetic fields from adjacent word lines before they can affect the semiconductor layer, preventing interference rather than merely mitigating it
Solution Approach 2:
The patent employs composite structures where protruding portions made of conductive material are integrated with the insulating layer and semiconductor layer. This composite arrangement creates a multi-functional structure that provides both electrical connectivity and electromagnetic shielding, allowing close positioning of word lines while maintaining electrical isolation and protecting semiconductor layer integrity
Data Source
AI summary
A semiconductor storage device according to one embodiment includes a multi-layered body and a first wiring. The multi-layered body includes a plurality of first layers and a plurality of second layers. The first wiring extends in a first direction within the multi-layered body. Each of the plurality of first layers includes a second wiring, a capacitor electrode, a semiconductor layer, and a first protruding portion. The second wiring extends in a second direction intersecting with the first direction. At least a part of the semiconductor layer is between the second wiring and the capacitor electrode. The first protruding portion protrudes from the second wiring in a third direction intersecting with the first direction and the second direction and covers at least a part of the semiconductor layer from one side in the first direction.