Multilayer Word Lines with Plural Work Functions for 3D NAND Memory

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Solution Overview

Problem

In three-dimensional NAND memory devices, neighboring word line interference due to continuous charge trapping layers across multiple levels leads to reduced operational windows for programming and sensing, affecting performance and reliability.

Innovation Solution

The implementation of multilayer, plural work function word lines, where conductive layers with different work functions are used, reducing interference by altering the threshold voltage for neighboring memory cells.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If a continuous charge trapping layer is used across multiple levels, then memory density is improved, but neighboring word line interference increases

Engineering Contradiction:
Improvememory densityVSAvoidneighboring word line interference
Core Design Contradiction:
Quantity of substanceVSObject-affected harmful factors

Solution Approach 1:

The continuous charge trapping layer is segmented into multiple discrete charge trapping layers at different levels, each associated with specific word lines. This segmentation allows selective activation and deactivation of charge trapping layers during programming and sensing operations, reducing interference between neighboring word lines while maintaining high memory density through vertical stacking.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different work function materials are used for word lines at different levels (e.g., first work function material for lower levels, second work function material for upper levels). This creates local quality variations that enable differential voltage control, allowing selective programming of specific memory cells without affecting neighboring word lines, thus reducing interference while maintaining high density.

Inventive Principle:
Principle #3Local quality

2Object-affected harmful factors

If multilayer plural work function word lines are implemented, then neighboring word line interference is reduced, but device complexity increases

Engineering Contradiction:
Improveneighboring word line interferenceVSAvoiddevice complexity
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The alternating stack structure serves multiple functions simultaneously: it provides mechanical support, electrical isolation between levels, and a framework for forming both charge trapping layers and word lines. The sacrificial material layers are removed to create voids that are subsequently filled with conductive materials to form word lines, eliminating the need for separate fabrication processes for different components.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The alternating stack of insulating and sacrificial material layers is formed in advance before the memory opening fill structures are created. The sacrificial material layers are positioned and configured beforehand, then removed selectively to form the word line structures. This preliminary action simplifies subsequent fabrication steps by pre-establishing the structural framework.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11101288B2Three-dimensional memory device containing plural work function word lines and methods of forming the same
Publication Date: 2021.08.24 SANDISK TECHNOLOGIES LLC
  • US11101288B2 patent drawing
  • US11101288B2 patent drawing
  • US11101288B2 patent drawing

AI summary

A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers located over a substrate, memory openings vertically extending through the alternating stack, and memory stack structures extending through the alternating stack. Each of the memory stack structures contains a memory film and a vertical semiconductor channel. At least one of the electrically conductive layers contains a first conductive material portion having a respective inner sidewall that contacts a respective one of the memory films at a vertical interface, and a second conductive material portion that has a different composition from the first conductive material portion, and contacting the first electrically conductive material portion. The first conductive material portion has a lower work function than the second conductive material portion.