Multi-Layered Controller Architecture for Non-Volatile Memory Parallel Operations

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional non-volatile storage units require multiple cycles and increased power consumption, latency, and thermal dissipation due to serial operation of multiple controllers, leading to higher costs and inefficiencies in processing large amounts of data.

Innovation Solution

A multi-layered controllers architecture with a master controller and local controllers that group operations and execute them in parallel, reducing the need for repetitive command issuance and waiting, and utilizing an internal processing unit to broadcast commands efficiently across an array of non-volatile memories.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If multiple controllers operate serially to manage non-volatile storage elements, then each controller can be simple and independent, but the overall system requires multiple cycles, consumes more power, and has longer latency

Engineering Contradiction:
Improvecontroller complexityVSAvoiddata processing speed
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The controller is segmented into multiple independent controllers (first controller, second controller, third controller, fourth controller), each managing specific non-volatile storage elements. This segmentation allows parallel operation of multiple controllers simultaneously, eliminating the serial operation bottleneck while keeping each individual controller relatively simple in structure.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from a single-dimensional serial controller architecture to a multi-dimensional parallel controller architecture. By introducing multiple controllers operating in parallel across different dimensions (first controller for first elements, second controller for second elements, etc.), the system achieves simultaneous data processing without increasing individual controller complexity significantly.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Ease of operation

If multiple controllers perform repetitive sequential operations to initialize and issue commands, then each controller can operate independently, but power consumption and thermal dissipation increase

Engineering Contradiction:
Improvecontroller operation independenceVSAvoidpower consumption
Core Design Contradiction:
Ease of operationVSUse of energy by stationary object

Solution Approach 1:

The repetitive initialization and command issuance operations are segmented and distributed across multiple controllers. Each controller performs its own initialization once and then operates independently without requiring repetitive re-initialization, reducing overall power consumption while maintaining operational independence.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Each controller performs its initialization action once during setup rather than repeatedly during operation. The preliminary initialization is done at controller startup or when entering service mode, eliminating the need for repetitive initialization cycles that would consume additional power during data processing operations.

Inventive Principle:
Principle #10Preliminary action

3Device complexity

If a single controller manages all non-volatile storage elements, then the controller architecture is simple, but data processing speed and bandwidth are limited

Engineering Contradiction:
Improvecontroller architectureVSAvoiddata throughput
Core Design Contradiction:
Device complexityVSSpeed

Solution Approach 1:

The single controller is segmented into multiple controllers (first, second, third, fourth controllers), each responsible for specific non-volatile storage elements. This segmentation enables parallel data processing and increases bandwidth by allowing simultaneous operations across multiple storage elements without requiring a single complex controller to manage all elements sequentially.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Multiple controllers are merged into a unified system that operates in parallel. The controllers share common resources such as the host interface and coordinate through a controller service mode, combining their individual capabilities to achieve higher overall data throughput while maintaining simpler individual controller designs.

Inventive Principle:
Principle #5Merging (Combining)

4Device complexity

If serial operation is used for initializing and commanding multiple controllers, then each controller can be independently designed, but latency increases

Engineering Contradiction:
Improvecontroller design independenceVSAvoidoperation latency
Core Design Contradiction:
Device complexityVSLoss of time

Solution Approach 1:

The initialization and command issuance process is segmented and parallelized across multiple controllers. Each controller performs its initialization and command operations independently in parallel rather than sequentially, dramatically reducing the total latency while maintaining independent controller designs.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Multiple controllers operate continuously in parallel without waiting for previous operations to complete. The first controller can issue commands to first non-volatile storage elements while the second controller simultaneously issues commands to second non-volatile storage elements, eliminating the serial waiting time that would cause latency accumulation.

Inventive Principle:
Principle #20Continuity of useful action

Data Source

PatentUS9990159B2Apparatus, system, and method of look-ahead address scheduling and autonomous broadcasting operation to non-volatile storage memory
Publication Date: 2018.06.05 EXECUTIVE ADVISORY FIRM LLC
  • US9990159B2 patent drawing
  • US9990159B2 patent drawing
  • US9990159B2 patent drawing

AI summary

A non-volatile memory system performs data operations efficiently for a host system by having a multi-layered architecture. The system includes multiple local controllers that are connected to an array of non-volatile memories, a master controller connected to the multiple local controllers, and an internal processing unit that communicates with the master controller. The internal processing unit receives data operation requests from the host system and generates groups of related operations. A group of related operations include a set of common addresses and multiple commands. The internal processing unit sends a group of related operations to the master controller, which in turn broadcasts the group of related operations to the local controllers, by first broadcasting addresses to the local controllers, broadcasting a first command to the local controllers, and then broadcasts a second command to the local controllers while the local controllers are still executing the first command.