Multi-Layered Source Structure for 3D Memory Channel Connection

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Solution Overview

Problem

As the number of stacked memory cells in three-dimensional semiconductor memory devices increases, connecting the channel layer with the source layer becomes more difficult, leading to a decrease in cell current and deteriorated operational reliability.

Innovation Solution

A manufacturing method involving the formation of a preliminary source stack structure with specific layers, including a first source layer, protective layers, and a sacrificial layer, followed by growing an interlayer source layer from the channel layers to surround the channel layers between protective layers, which helps in reducing interface resistance and voids, thereby enhancing cell current.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the number of stacked memory cells is increased, then the integration degree of the semiconductor device is improved, but the connection between the channel layer and the source layer becomes more difficult and cell current decreases

Engineering Contradiction:

Improveintegration degreeVSAvoidoperational reliability

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The source layer is divided into multiple segments: a first source layer, a second source layer, and an interlayer source layer formed between them. This segmentation allows each source layer to independently establish good electrical connection with the channel layer, preventing the connection deterioration that occurs with increased stacking height.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The source layer structure transitions from a single-layer configuration to a multi-layered vertical structure. The interlayer source layer is formed at an intermediate height between the first and second source layers, creating a three-dimensional arrangement that maintains electrical connection quality across multiple stacked memory cells.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

2Productivity

If the number of stacked memory cells is increased, then the integration degree of the semiconductor device is improved, but the cell current decreases

Engineering Contradiction:

Improveintegration degreeVSAvoidcell current

Core Design Contradiction:

ProductivityVSQuantity of substance

Solution Approach 1:

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The interlayer source layer acts as an intermediary structure between the first and second source layers. It provides an additional electrical conduction path and ensures stable current supply to the channel layer, preventing current decrease in highly integrated devices with multiple stacked memory cells.

Inventive Principle:

Principle #24Intermediary (Mediator)

3Reliability

If a multi-layered source structure is formed, then the electrical connection between channel layer and source layer is improved, but the manufacturing process complexity increases

Engineering Contradiction:

Improveelectrical connectionVSAvoidmanufacturing process complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The first source layer, first protective layer, sacrificial layer, second protective layer, and second source layer are pre-formed as a preliminary source stack structure before the interlayer source layer is created. This preliminary structure provides a template that guides subsequent processing steps and ensures proper alignment and positioning.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The sacrificial layer serves as a temporary intermediary structure that enables selective formation of the interlayer source layer. By using the sacrificial layer as a mask and etch stop, the manufacturing process achieves precise control over the interlayer source layer formation while maintaining simplicity in the overall process flow.

Inventive Principle:

Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method improves the operational reliability of semiconductor devices by ensuring stable cell current and reducing interface resistance between channel layers and the interlayer source layer, preventing void formation and enhancing the manufacturing process.

Implementation Method 1

growing a first region of an interlayer source layer from each channel layer, the first region of the interlayer source layer surrounding each channel layer

Methodology Applied

Scientific EffectEpitaxial growth: Epitaxy

Data Source

PatentUS9978771B2Manufacturing method of semiconductor device including multi-layered source layer and channel extending therethrough

Publication Date: 2018.05.22 SK HYNIX INC

AI summary

There are provided a manufacturing method of a semiconductor device. A manufacturing method of a semiconductor device includes forming a preliminary source stack structure including a first source layer, a first protective layer, a sacrificial layer, a second protective layer, and a second source layer, which are sequentially stacked in the recited order, forming channel layers extending through the second source layer and partially inside the first source layer, and growing a first region of an interlayer source layer from each channel layer, the first region of the interlayer source layer surrounding each channel layer in a region between the first and second protective layers.