Multi-Level Anti-Fuse Design for Chip Size Reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing anti-fuse structures in semiconductor devices require multiple sensing amplifiers, limiting the reduction of chip size due to their single anti-fuse configuration, which increases circuit size and hinders miniaturization.
Innovation Solution
A multi-level anti-fuse design is introduced, comprising at least three anti-fuses connected in parallel and one in series, with dielectric layers of varying thicknesses, allowing for a single sensing unit to operate multiple levels by applying different voltages to achieve distinct breakdown characteristics and reduce overall chip size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a single anti-fuse configuration is used with multiple sensing amplifiers, then each anti-fuse can be individually sensed, but the circuit size increases and chip miniaturization is hindered
Solution Approach 1:
Multiple anti-fuses are combined into a single string configuration where series-connected anti-fuses share a common sensing path. This merging allows a single sensing amplifier to detect the status of multiple anti-fuses simultaneously, reducing the number of sensing amplifiers needed and thereby decreasing circuit size while maintaining individual sensing capability through selective breakdown detection
Solution Approach 2:
The string of anti-fuses is designed to serve multiple functions: individual cell sensing, redundancy activation, and multi-level programming. By making the anti-fuse structure multi-functional, the patent eliminates the need for separate sensing circuits for each anti-fuse, thus reducing overall circuit complexity and chip area
2Measurement precision
If multiple sensing amplifiers are used for each anti-fuse, then individual anti-fuse status can be detected, but the device complexity increases
Solution Approach 1:
The patent merges multiple anti-fuse sensing operations into a single sensing amplifier by using a shared sensing path. The series string configuration allows one amplifier to monitor the collective status of multiple anti-fuses, reducing device complexity while maintaining the ability to detect individual anti-fuse breakdown events through selective activation
Solution Approach 2:
The anti-fuse string is segmented into multiple levels with different breakdown characteristics. This segmentation allows the single sensing amplifier to distinguish between different anti-fuse states by detecting progressive breakdown events, maintaining measurement precision without requiring multiple amplifiers
3Device complexity
If anti-fuses are connected in a single configuration, then the structure is simple, but the ability to perform multi-level programming is limited
Solution Approach 1:
Different anti-fuses within the string are given different local qualities through varying dielectric layer thicknesses. This creates distinct breakdown voltage thresholds for each anti-fuse level, enabling multi-level programming where each level can be selectively activated based on its unique electrical characteristics while maintaining a relatively simple series string structure
Solution Approach 2:
The patent changes the dielectric parameter (thickness) of anti-fuses to create a progression of breakdown voltages. This parameter variation enables multi-level programming capability within a simple series structure, as each anti-fuse level responds to different voltage thresholds, allowing progressive programming without complex circuitry
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enables a decrease in the number of sensing means per anti-fuse, allowing for a smaller anti-fuse circuit and total chip size, while maintaining multi-level program functionality through varied breakdown voltages and resistance levels.
Implementation Method 1
the breakdown voltages of each dielectric layer may be different from one another
Data Source
AI summary
Provided may be a multi-level anti-fuse and methods of fabricating and operating the same. The multi-level anti-fuse may include at least three anti-fuses having a plurality of anti-fuses connected in parallel constituting a parallel connection structure and at least one anti-fuse connected to the parallel connection structure in series, wherein the parallel connection structure may have a smaller resistance than the resistance of the anti-fuse connected in series, the plurality of anti-fuses connected in parallel may include dielectric layers having different thicknesses from one another, and the breakdown voltages of each dielectric layer may be different from one another.