Multilevel ASD Circuitry With Zig-Zag Harmonic Blocking
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Solution Overview
Problem
Conventional adjustable speed drive (ASD) solutions for high-speed motors face limitations due to excessive harmonic distortion, particularly with fundamental frequencies exceeding 200Hz, leading to inefficiencies and potential motor damage from vibratory torque, as existing technologies are not designed to handle high-speed, high-power applications effectively.
Innovation Solution
A multi-level high-speed adjustable speed drive circuitry that operates in Fundamental Frequency Mode (FFM) using a quasi-rectangular variable-voltage wave, coupled with a zig-zag interphase transformer to cancel lower-order harmonics, allowing for efficient operation without series connections of semiconductor switches and minimizing harmonic distortion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conventional PWM method is used to synthesize sinusoidal voltage, then voltage control is achieved, but harmonic distortion increases excessively when fundamental frequency exceeds 200Hz
Solution Approach 1:
The patent divides the voltage synthesis into multiple discrete levels (multi-level inverter) rather than using continuous PWM switching. This segmentation of the voltage waveform into distinct steps reduces the need for high-frequency switching while maintaining voltage control, thereby reducing harmonic distortion at high fundamental frequencies.
Solution Approach 2:
The patent employs periodic switching patterns in the multi-level inverter that are optimized for high-frequency operation. By using periodic action with carefully designed switching sequences, the system achieves voltage synthesis with reduced harmonic content compared to conventional PWM, especially when the fundamental frequency exceeds 200Hz.
2Stress or pressure
If MV semiconductors with limited switching frequency (900Hz) are used, then medium voltage output is achieved, but the system cannot operate at high speeds requiring fundamental frequencies above 200Hz
Solution Approach 1:
The patent uses a multi-level inverter topology that dynamically adjusts voltage levels through multiple discrete steps rather than relying on high-frequency PWM switching. This dynamic structure allows the system to operate at high fundamental frequencies (above 200Hz) while using MV semiconductors with limited switching capabilities (900Hz), as the effective switching frequency requirement is reduced through the multi-level voltage synthesis approach.
3Device complexity
If conventional three-phase ASDs are designed for lower speed motors, then control simplicity is maintained, but they cannot effectively drive high-speed motors above 3600 RPM
Solution Approach 1:
The patent employs a multi-level inverter that segments the voltage output into multiple discrete levels, allowing the control system to manage high-speed motor operation through stepped voltage synthesis rather than continuous PWM. This segmentation approach maintains relative control simplicity while enabling effective drive of high-speed motors above 3600 RPM by reducing the computational burden of high-frequency PWM control.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution achieves high efficiency (>99.4%) and low total harmonic distortion (THD < 3%), enabling reliable operation across a wide RPM range with reduced motor losses and torque ripple, suitable for high-power, high-speed applications up to 15000 RPM.
Implementation Method 1
coupled with a zig-zag interphase transformer to cancel lower-order harmonics
Data Source
Figure 1~2
Figure 3
Figure 4~5
AI summary
A multi-level high-speed adjustable speed drive has a plurality of modular multilevel, 3-phase inverter bridges, wherein the multilevel, 3-phase inverter bridges operate with fundamental frequency, f, wherein the multilevel, 3-phase inverter bridges include at least three levels, wherein the multilevel, 3-phase inverter bridges operate in Pulse-Width Modulation (PWM) mode with 9 to 21 x or operating in Fundamental Frequency Mode (FFM), wherein inverter commutation frequency equals the fundamental frequency, wherein the multilevel, 3-phase inverters operate with split phase such that one group is displaced from the other by an angle, θ = 60/q, wherein the phase displacement of a harmonic component of order n between groups, θn is nθ /q; a high-speed polyphase motor with phases arranged in q 3-phase groups; and electromagnetic means for blocking selected groups of harmonics while passing components at fundamental frequency, f, wherein the electromagnetic means includes coils carrying motor current linked by a magnetic core, wherein the electromagnetic means is interposed between the plurality of modular multilevel, 3-phase inverter bridges and the high-speed polyphase motor.