Multi-Level DAC Switching for Low-Noise Sigma-Delta ADC References
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Solution Overview
Problem
High-resolution analog-to-digital converters (ADCs) face challenges in reducing 1/f noise and DC offset from voltage reference sources, which are not effectively addressed by existing technologies, leading to noise figure issues and gain errors, especially in low-bandwidth systems.
Innovation Solution
A multi-level, five-level digital-to-analog converter (DAC) with a chopper stabilized voltage reference and specific switching patterns is used, combining inherent linearity and 1/f noise reduction without the need for calibration, utilizing a switched capacitor sigma-delta ADC architecture.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a chopper stabilized voltage reference is used to reduce DC offset, then DC offset is reduced, but high-frequency modulation noise is introduced
Solution Approach 1:
A low-pass filter is introduced as an intermediary component between the chopper stabilized voltage reference and the sigma-delta converter. This filter mediates by removing the high-frequency modulation noise generated by the chopper stabilization while preserving the DC offset reduction benefit, allowing the harmful high-frequency noise to be filtered out before affecting the converter performance
Solution Approach 2:
The high-frequency modulation noise generated by chopper stabilization is converted into a benefit by using it to drive a low-pass filter. The filter's rejection of these high-frequency components simultaneously removes the harmful noise while the chopper stabilization continues to provide DC offset reduction, transforming the harmful byproduct into a useful filtering mechanism
2Measurement precision
If oversampling is increased to reduce thermal noise, then thermal noise is reduced, but 1/f noise and DC offset remain unaffected
Solution Approach 1:
The noise reduction approach is segmented into two distinct mechanisms: oversampling for thermal noise reduction and chopper stabilization for 1/f noise and DC offset reduction. By dividing the noise mitigation strategy into separate functional blocks, each addressing specific noise types, the system achieves comprehensive noise reduction without relying on a single technique
Solution Approach 2:
A chopper stabilized voltage reference with feedback mechanism is implemented to actively reduce 1/f noise and DC offset. The feedback loop continuously monitors and corrects for low-frequency noise and offset errors, providing reliable suppression of these noise components that are not affected by oversampling
3Measurement precision
If multi-bit DAC is used to improve resolution and signal-to-noise ratio, then resolution and SNR are improved, but linearity is degraded
Solution Approach 1:
The multi-bit DAC is designed with inherent linearity features that allow it to self-correct for linearity errors without requiring external calibration or trimming. The architecture includes built-in compensation mechanisms that automatically maintain linearity across process variations, enabling the DAC to serve itself and eliminate the need for manual adjustment
4Measurement precision
If voltage reference ratio is close to 1 for high dynamic range, then dynamic range is improved, but reference voltage noise has greater impact on output
Solution Approach 1:
The chopper stabilized voltage reference converts the harmful effect of reference voltage noise into a benefit by using high-frequency chopping to modulate the noise away from the signal band. The noise is not eliminated but transformed to high frequencies where it can be easily filtered, turning the noise problem into an opportunity for selective frequency-domain filtering
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution improves signal-to-noise ratio and resolution while reducing 1/f noise and gain errors, enabling efficient noise cancellation and eliminating the need for additional calibration or modification of the voltage reference technique, making it suitable for multi-channel systems.
Implementation Method 1
A multi-level, five-level digital-to-analog converter (DAC) with a chopper stabilized voltage reference and specific switching patterns is used, combining inherent linearity and 1/f noise reduction
Implementation Method 2
A chopper stabilized bandgap voltage reference is more fully described in United States Patent No. 6,462,612, entitled 'Chopper Stabilized Bandgap Reference Circuit to Cancel Offset Variation' by Roh et al.
Implementation Method 3
Such a low pass filter isn't required when the chopped Bandgap voltage is directly applied to the reference input of a sigma-delta converter: the HF chopping noise can be filtered out by the decimation and/or digital low-pass filter
Data Source
Figure 1
Figure 2
Figure 3a~3c
AI summary
A multi-bit digital-to-analog converter has a reference voltage generator generating a reference voltage with an offset voltage; a.switched capacitor stage for generating a plurality of output voltages; and a switching sequencer controlling the switched capacitor stage operable to generate switching patterns for each output voltages, wherein each pattern has a charge phase and a transfer phase, and wherein for at least one output voltage the switching sequencer provides two switching patterns wherein each switching pattern contributes an offset of opposite polarity.