Multilevel Die Complex With Integrated Passive Components
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Solution Overview
Problem
Previous multilevel die complexes rely on dummy silicon dies for thermal management and mechanical stability, which do not provide electrical functionality, and the on-die voltage regulator power delivery path is inefficient due to excessive TSV paths through bulk silicon, leading to high resistance and space inefficiency.
Innovation Solution
Integration of silicon or organic-based discrete passive components, such as inductors and capacitors, on top of the base die to enhance power delivery, filtering, and decoupling, replacing dummy silicon with magnetic inductor arrays and on-die capacitors to reduce TSV paths and eliminate the need for on-package inductors, thereby improving power delivery efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If dummy silicon dies are used for thermal management and mechanical stability, then thermal dissipation and mechanical stability are improved, but electrical functionality is lost and space is wasted
Solution Approach 1:
The patent applies multi-functionality by integrating passive components (inductors, capacitors, filters) that simultaneously provide electrical functionality and maintain thermal management capabilities. The passive components are positioned to conduct heat away from hot spots while providing their electrical functions, eliminating the need for non-functional dummy dies.
Solution Approach 2:
The patent changes the parameter of the top die from being a non-functional dummy silicon die to an active passive component die. This parameter change transforms the die from providing only thermal management to providing both thermal management and electrical functionality through integrated passive components.
2Power
If on-die voltage regulator power delivery path uses excessive TSV paths through bulk silicon, then power delivery is achieved, but resistance increases and space efficiency decreases
Solution Approach 1:
The patent extracts the inductor from the bulk silicon substrate and places it on the top die surface. This extraction eliminates the need for excessive TSV paths through the bulk silicon, reducing resistance and power loss while maintaining the power delivery function.
Solution Approach 2:
The patent moves the inductor from a three-dimensional position within the bulk silicon to a two-dimensional position on the top die surface. This dimensional change reduces the number of TSV paths required and lowers the overall resistance of the power delivery path.
3Power
If on-package inductors are used, then power delivery is achieved, but space efficiency and power consumption are worsened
Solution Approach 1:
The patent merges the inductor with the top die by integrating it directly onto the die surface. This combination eliminates the need for separate on-package inductors, reducing the overall package size and improving space efficiency while maintaining power delivery functionality.
Data Source
AI summary
A package is disclosed. The package includes a base die. The base die includes voltage regulating circuitry and input and output (I/O) circuitry. The I/O circuitry surrounds the voltage regulating circuitry. The package also includes a top set of dies. The top set of dies includes a plurality of dies that include logic circuitry and a plurality of dies that include passive components. The plurality of dies that include passive components surround the plurality of dies that include logic circuitry. The plurality of dies that includes passive components is coupled to the logic circuitry and to the voltage regulating circuitry.