Multi-Level DRAM Data Transmission With Fewer Signal Paths

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Solution Overview

Problem

The data transmission efficiency of dynamic random access memory (DRAM) in semiconductor memories needs improvement.

Innovation Solution

A data transmitting circuit with a parallel-to-serial conversion and multi-level modulation circuit to convert parallel data signals into serial data combinations with varying voltage values, and a data receiving circuit with data comparison and logic processing to decode these signals, utilizing through silicon vias for efficient signal transmission.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If parallel data signals are transmitted using traditional methods, then the number of transmission paths increases, but the data transmission efficiency remains limited

Engineering Contradiction:
Improvedata transmission efficiencyVSAvoidnumber of transmission paths
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent merges multiple parallel data signals into a single serial data stream using a parallel-to-serial conversion circuit. This consolidation reduces the number of transmission paths from multiple parallel channels to a single serial channel, thereby simplifying the transmission structure while maintaining or improving data transmission efficiency through multi-level modulation techniques.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent employs multi-level modulation to change the voltage parameter of the data signal. By representing n-bit data using a one-bit target data signal with multiple voltage values (e.g., 4-level modulation where different voltage levels represent different data combinations), the system increases the information density per transmission path, thereby improving productivity without requiring proportional increases in the number of transmission paths.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If multiple parallel data signals are converted to serial format with multi-level modulation, then transmission efficiency improves, but the circuit complexity increases

Engineering Contradiction:
Improvedata transmission efficiencyVSAvoidcircuit complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent segments the complex modulation task into distinct functional modules: a parallel-to-serial conversion circuit that handles signal format conversion, and a multi-level modulation circuit that handles voltage level encoding. This segmentation allows each module to perform its specific function independently, making the overall complex system more manageable and potentially easier to manufacture despite the increased functionality.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The modulation circuit is designed to handle multiple data combinations (n-bit data) using a unified multi-level modulation approach. The circuit can process different data widths and voltage level configurations, making it a universal solution that can be adapted to various data transmission requirements without requiring completely different circuit designs for each application.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentEP4715817A1Data sending circuit, data receiving circuit, and electronic device
Publication Date: 2026.03.25 RUILI INTEGRATED CIRCUIT CO LTD
  • EP4715817A1 patent drawingFigure 1~2
  • EP4715817A1 patent drawingFigure 3~5
  • EP4715817A1 patent drawingFigure 6

AI summary

The present disclosure provides a data sending circuit, a data receiving circuit, and an electronic device. The data sending circuit comprises a parallel-to-serial conversion circuit, a multi-level modulation circuit and a first transmission path; the parallel-to-serial conversion circuit is configured to convert a plurality of parallel initial data signals into serial data combinations, wherein each data combination comprises an n-bit data signal; the multi-level modulation circuit is configured to generate and output a target data signal on the basis of each data combination; and the first transmission path is coupled with the multi-level modulation circuit and is configured to transmit the target data signal to a second chip. According to the present disclosure, by means of multi-value transmission technology, a one-bit target data signal is used for the transmission of the n-bit data signal, so that the number of transmission paths can be reduced, and the transmission efficiency is improved.