Multilevel Driver Segmentation for Low Power Vector Signaling
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Solution Overview
Problem
High-speed integrated circuit processes face challenges in fabricating output drivers for vector signaling codes due to the need for large transistors and stable output impedance, particularly in achieving low power consumption and high bandwidth while managing signal interference and crosstalk in multi-wire communication systems.
Innovation Solution
The implementation of a balanced vector signaling code that uses multiple wires to transmit symbols, with each wire having multiple voltage or current levels, and a method of generating weighted analog signal components by combining sub-channel components, allowing for efficient data transmission with low power utilization and high bandwidth, utilizing a configuration of parallel line driver elements and modular design to match transmission line impedance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If large transistors are used in output drivers to achieve stable output impedance, then reliability is improved, but power consumption increases and device area increases
Solution Approach 1:
The output driver is divided into multiple parallel line driver elements instead of using a single large transistor. Each element contributes to the overall output impedance stability while consuming less individual power, collectively achieving the required stability without the power penalty of a single large device.
Solution Approach 2:
Multiple line driver elements are combined in parallel to achieve the equivalent performance of a large transistor. The combined output impedance of multiple smaller elements provides the necessary stability while maintaining lower power consumption compared to a single large transistor implementation.
2Reliability
If large transistors are used in output drivers to achieve stable output impedance, then reliability is improved, but device area increases
Solution Approach 1:
The output driver functionality is segmented into multiple smaller line driver elements that can be arranged in parallel. This segmentation allows the same output impedance stability to be achieved with distributed smaller transistors rather than one large transistor, reducing the overall device area footprint.
Solution Approach 2:
Multiple small line driver elements are merged in parallel to collectively provide the stable output impedance. The combined area of multiple small elements is less than the area required for a single large transistor, achieving area efficiency while maintaining reliability.
3Productivity
If binary signaling is used on multiple wires, then pin efficiency is improved, but signal interference and crosstalk increase in multi-wire systems
Solution Approach 1:
The patent applies different signaling characteristics to different wires within the multi-wire interface. By assigning specific signal patterns and timing to individual wires, the system maintains pin efficiency while managing crosstalk through localized signal quality control rather than uniform signaling across all wires.
Solution Approach 2:
The signaling system uses periodic transmission patterns with controlled timing across multiple wires. By coordinating the periodic action of signals on different wires, the system achieves high pin efficiency while minimizing interference through temporal separation and synchronized periodic transmission.
4Speed
If high-speed transmission is implemented, then bandwidth is improved, but power consumption and signal interference increase
Solution Approach 1:
The high-speed transmission capability is distributed across multiple parallel line driver elements rather than concentrated in a single driver. This segmentation allows the system to achieve high aggregate bandwidth while each individual element operates at lower power, reducing total power consumption compared to a single high-speed driver.
Data Source
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AI summary
Methods and systems are described for receiving a set of input bits at a plurality of drivers and responsively generating an ensemble of signals, each respective signal of the ensemble of signals generated by receiving a subset of input bits at a respective driver connected to a respective wire of a multi-wire bus, the received subset of bits corresponding to sub-channels associated with the respective wire, generating a plurality of weighted analog signal components, each weighted analog signal component (i) having a corresponding weight and sign selected from a set of wire-specific sub-channel weights associated with the respective wire and (ii) modulated by a corresponding bit of the received subset of bits, and generating the respective signal by forming a summation of the plurality of weighted analog signal components at a common node connected to the respective wire for transmission over the respective wire of the multi-wire bus.