Multilevel Encoding for Flash Memory Error Correction
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Solution Overview
Problem
Existing flash devices are inefficient in supporting error correction codes for small data writes, leading to compromised reliability due to omission of error correction in single bit per cell (SBC) regions.
Innovation Solution
A non-volatile memory device employs a multilevel encoding scheme that uses a programmer to encode data into a group of multilevel cells, providing error correction coverage by level-shifting cells and managing surplus cell state transitions to achieve a desired Hamming distance, ensuring reliable small granularity programming operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If single bit per cell (SBC) encoding is used for small writes, then write granularity is improved, but reliability deteriorates due to omission of error correction
Solution Approach 1:
The patent combines SBC and MBC encoding schemes into a unified multilevel encoding framework. Small writes use SBC encoding with programmed cell transitions, while large writes use MBC encoding with error correction codes. The system merges these previously separate approaches into a single flexible architecture that adapts to write size requirements.
Solution Approach 2:
The patent introduces dynamic selection between different encoding modes (SBC and MBC) based on write granularity requirements. The system can switch between single-bit programming for small writes and multi-bit programming with error correction for large writes, making the error correction capability adaptive rather than static.
2Reliability
If error correction codes are applied to small writes, then reliability is improved, but device complexity increases
Solution Approach 1:
The patent segments the encoding space into distinct regions: SBC encoding for small writes (0-1 bits per cell group) and MBC encoding for large writes (2+ bits per cell group). This segmentation allows error correction to be applied selectively only where needed, rather than universally across all write sizes.
Solution Approach 2:
The patent changes the parameter of encoding granularity dynamically. By adjusting the number of bits programmed per cell group based on write size, the system optimizes between simplicity (SBC for small writes) and reliability (MBC with ECC for large writes), avoiding the complexity of universal ECC application.
3Reliability
If multilevel encoding with error correction is implemented, then reliability is improved, but manufacturing precision requirements increase
Solution Approach 1:
The patent applies preliminary error correction encoding before the write operation. By pre-calculating the required cell transitions and verifying error correction coverage in advance, the system ensures reliable small writes without requiring ultra-precise control during the actual programming process.
Solution Approach 2:
The patent incorporates feedback mechanisms through verification of programmed cell states. After programming, the system verifies that the desired Hamming distance and error correction coverage were achieved, allowing for correction or re-programming if precision requirements are not met.
Data Source
AI summary
Embodiments of the present disclosure provide methods, systems, and apparatuses related to multilevel encoding with error correction. In some embodiments, a plurality of bits may be encoded into a plurality of memory cells by level-shifting a subset of the plurality of multilevel memory cells for a bit of the plurality of bits. Other embodiments may be described and claimed.