Multilevel Flash Encoding for Small-Write Error Correction

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Solution Overview

Problem

Existing flash devices are inefficient in supporting error correction codes for small data writes, leading to compromised reliability due to omission of error correction in single bit per cell (SBC) regions.

Innovation Solution

A multilevel encoding scheme is implemented, where input data is encoded into a greater number of multilevel memory cells (MLCs) using level-shifting, providing error correction coverage for small granularity programming operations by managing surplus cell state transitions to achieve a desired Hamming distance and ensuring reliable data storage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If single bit per cell (SBC) encoding is used for small writes, then write granularity and flexibility are improved, but error correction reliability deteriorates

Engineering Contradiction:
Improvewrite granularityVSAvoiderror correction reliability
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The memory device is divided into different encoding regions: SBC regions for small writes and MBC regions for large writes. Each region uses appropriate error correction codes matched to its write granularity requirements, allowing flexible small writes while maintaining reliable error correction where needed

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different error correction strategies are applied locally to different regions of the memory device. SBC regions use lightweight or no error correction for flexibility, while MBC regions use robust error correction codes for reliability, optimizing each region according to its specific operational characteristics

Inventive Principle:
Principle #3Local quality

2Device complexity

If error correction codes are omitted for small writes, then device complexity and overhead are reduced, but data reliability deteriorates

Engineering Contradiction:
Improveerror correction overheadVSAvoiddata reliability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

Error correction is applied partially only to MBC regions where it is most needed, rather than universally to all write operations. This provides sufficient protection for large writes while avoiding unnecessary overhead for small writes that are less susceptible to errors

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The error correction strategy changes based on write size parameters. Small writes (SBC) use different error correction parameters or none at all, while large writes (MBC) use robust error correction parameters, optimizing the balance between complexity and reliability based on operational parameters

Inventive Principle:
Principle #35Parameter changes

3Reliability

If multilevel encoding with error correction is implemented, then reliability for small writes is improved, but encoding complexity and processing time increase

Engineering Contradiction:
Improvesmall write reliabilityVSAvoidencoding complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The encoding process is segmented into different modes: simple encoding for SBC regions and multilevel encoding with error correction for MBC regions. This segmentation allows the system to achieve high reliability for small writes through multilevel encoding only when necessary, avoiding unnecessary complexity for all operations

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The encoding strategy is dynamic and adapts to the specific write operation requirements. The system determines whether to use simple or multilevel encoding based on the write size and characteristics, providing flexible adaptation that balances reliability improvement with complexity management

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS20130024749A1Multilevel encoding with error correction
Publication Date: 2013.01.24 MICRON TECHNOLOGY INC
  • US20130024749A1 patent drawing
  • US20130024749A1 patent drawing
  • US20130024749A1 patent drawing

AI summary

Embodiments of the present disclosure provide methods, systems, and apparatuses related to multilevel encoding with error correction. In some embodiments, a plurality of bits may be encoded into a plurality of memory cells by responding to bits of the plurality of bits by changing the logic levels of corresponding groups of memory cells of the plurality of memory cells. Other embodiments may be described and claimed.