Multilevel Inverter Reactive Power Compensator Design
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Solution Overview
Problem
Conventional reactive power compensators are large and bulky, making them unsuitable for installation in narrow spaces, and their high switching losses lead to increased heat generation and harmonic issues when used with distributed power sources like solar power generation, which can cause voltage fluctuations in power systems.
Innovation Solution
A compact reactive power compensator design using multilevel inverter circuits with single-phase full-bridge single-pulse inverters and a control section to reduce voltage harmonics, employing high withstand-voltage semiconductor devices and a transformerless interconnection, which reduces switching losses and allows for a smaller number of inverter stages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If conventional reactive power compensators are used to suppress voltage elevation, then system voltage can be controlled, but the compensators are large and bulky making them unsuitable for installation in narrow spaces
Solution Approach 1:
The compensator is divided into multiple PWM inverter stages connected in series, each stage contributing to the overall voltage output. This segmentation allows the total voltage to be achieved with smaller individual components, reducing the overall volume while maintaining the required voltage level for effective reactive power compensation.
Solution Approach 2:
The patent transitions from a single-stage high-voltage design to a multi-stage series connection approach, changing the dimensional arrangement of voltage generation. By stacking multiple lower-voltage stages vertically (in series), the system achieves the same voltage output with reduced horizontal footprint, enabling installation in narrow spaces.
2Manufacturing precision
If multiple PWM inverter stages are connected in series to reduce harmonics and AC filter reactor size, then voltage waveform quality improves, but the number of inverter stages becomes large increasing volume and circuit complexity
Solution Approach 1:
The patent changes the voltage width parameter of the PWM inverters to a specific small value that optimizes the balance between harmonic reduction and circuit complexity. By carefully selecting this parameter, the system achieves satisfactory voltage waveform quality with a manageable number of stages, avoiding excessive complexity while maintaining manufacturing precision.
3Adaptability or versatility
If the number of PWM inverter stages is increased to achieve ample withstand-voltage without transformer, then transformerless interconnection is possible, but the number of inverter gate circuits and PWM switching circuits increases resulting in larger volume and higher switching losses
Solution Approach 1:
The patent optimizes the voltage width parameter of the PWM inverters to minimize switching losses while maintaining adequate withstand-voltage capability. By adjusting this critical parameter, the system achieves transformerless interconnection with a reduced number of stages, thereby lowering total switching losses and improving energy efficiency.
Solution Approach 2:
The patent uses multiple identical PWM inverter stages with the same optimized parameters rather than designing complex single-stage high-voltage inverters. This copying approach simplifies the design of each individual stage, reduces the complexity of control circuits, and allows for modular construction that minimizes overall switching losses while achieving the required voltage level.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces voltage harmonics and achieves transformerless interconnection with a smaller size, minimizing switching losses and heat generation, enabling efficient reactive power compensation without energy wastage.
Implementation Method 1
the method was adopted of creating an interconnection voltage waveform by connecting in series multiple PWM (Pulse Width Modulation) inverters that output pulse width-modulated voltage waveforms
Implementation Method 2
filter circuits for reducing current harmonics connected between the outputs of the multilevel inverter circuits and system interconnection terminals
Data Source
AI summary
A reactive power compensator according to an embodiment comprises: multilevel inverter circuits respectively constituting each of the three phases; a filter circuit for reducing harmonics connected between the output terminals of each of the multilevel inverter circuits and a power system interconnection terminal; and a control section for causing prescribed three-phase AC voltage to be output by controlling each of said multilevel inverter circuits. Each of the multilevel inverter circuits is constituted by connecting in series one or more single-phase full-bridge single-pulse inverters and is arranged to convert DC voltage to respective positive and negative single-pulse voltages once per cycle of the fundamental wave of the voltage instruction value.