Multilevel Inverter Reducing Conduction Loss
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Solution Overview
Problem
Conventional multilevel medium voltage inverters face challenges in reducing conduction loss and minimizing the number of power semiconductor diodes, leading to inefficiencies and increased size and cost.
Innovation Solution
A multilevel inverter configuration with a rectifier, smoothing unit, and inverter unit using a cascaded T-type NPC structure, which reduces the number of power semiconductor devices and conduction loss by optimizing switch configurations and capacitor connections, allowing for a more efficient power conversion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If conventional multilevel inverter topology is used, then the inverter can provide multilevel output voltage, but the number of power semiconductor diodes increases leading to increased conduction loss and reduced efficiency
Solution Approach 1:
The patent combines multiple H-bridge inverter units into a single integrated multilevel inverter structure. By merging the functional blocks and sharing common components (such as DC voltage sources and power semiconductor switches), the design reduces the total number of power semiconductor diodes while maintaining the ability to generate multilevel output voltages, thereby reducing conduction losses and improving efficiency
Solution Approach 2:
The patent designs power semiconductor switches that serve multiple functions across different H-bridge units. Each switch is configured to operate in multiple H-bridge circuits simultaneously, allowing a single power semiconductor device to replace what would traditionally require multiple separate devices. This multi-functionality approach directly reduces the total count of power semiconductor diodes and minimizes conduction losses
2Reliability
If conventional multilevel inverter topology is used, then the inverter can drive large inertia industrial loads, but the system size and cost increase due to more power semiconductor devices
Solution Approach 1:
By merging multiple H-bridge units into an integrated structure with shared components, the patent reduces the overall system size and weight while maintaining the power output capability needed to drive large inertia industrial loads. The consolidated design eliminates redundant components that would otherwise increase system mass
3Productivity
If conventional multilevel inverter topology is used, then the inverter can provide multilevel output voltage, but the number of power semiconductor devices increases leading to increased cost
Solution Approach 1:
The patent merges multiple inverter units into a single integrated structure, reducing the total number of power semiconductor devices required. This consolidation directly lowers component costs and simplifies the manufacturing process while preserving the multilevel output voltage capability that enables efficient motor drive applications
Solution Approach 2:
By designing power semiconductor switches with multi-functional capabilities that allow them to operate across multiple H-bridge units, the patent reduces the total device count required. This universality approach lowers component procurement costs and simplifies assembly operations without compromising the multilevel voltage generation capability
Data Source
AI summary
A multilevel inverter having a configuration adequate to enhance efficiency while reducing conduction loss is disclosed, the multilevel inverter including a rectifier, a smoothing unit and an inverter unit, wherein the inverter unit includes a first switch unit interposed between the first node and a first output terminal, second switch units interposed between the second node and the first output terminal, a third switch unit interposed between the third node and the first output terminal, a fourth switch unit interposed between the first node and a second output terminal, fifth switch units interposed between the second node and the second output terminal and a sixth switch unit interposed between the third node and the second output terminal.