Multilevel Semiconductor Layer With Quantized Conduction States
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Solution Overview
Problem
Existing semiconductor technologies face limitations in achieving high-performance, multifunctionality, and integration due to the challenges of down-scaling conventional MOSFETs, with multilevel elements like single-electron transistors and resonant-tunneling transistors requiring complex fabrication and low-temperature operation.
Innovation Solution
A layer with quantized conduction states is developed, featuring localized states between low- and high-level electron energy ranges, achieved through a simple process, comprising amorphous and crystalline regions with resonant energy matching, allowing for multilevel element fabrication and driving methods.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional MOSFET down-scaling is pursued, then device integration increases, but fabrication complexity and fundamental limitations increase
Solution Approach 1:
The patent changes the fundamental operating parameters by transitioning from conventional continuous conduction MOSFETs to quantum-confined discrete energy level systems. By confining carriers in nanoscale potential wells, the device operates based on quantum mechanical energy level transitions rather than classical drift-diffusion, enabling new functionality without further down-scaling of conventional transistor geometries
Solution Approach 2:
The patent exploits quantum phase transitions by confining charge carriers in potential wells to create discrete energy levels. The system transitions from a continuous conduction band (bulk semiconductor) to a quantized energy level system (quantum confined structure), fundamentally changing the conduction mechanism and enabling multilevel operation
2Adaptability or versatility
If single-electron transistors and resonant-tunneling transistors are used for multilevel characteristics, then multilevel operation is achieved, but fabrication complexity increases and low-temperature operation is required
Solution Approach 1:
The patent uses uniform material composition (e.g., GaN) throughout the structure, achieving quantum confinement through geometric confinement in potential wells rather than requiring heterostructure interfaces. This homogeneous approach simplifies fabrication compared to multilayer heterostructures while maintaining quantum effects
Solution Approach 2:
The patent employs simple planar potential well structures that can be fabricated using standard semiconductor processing techniques, replacing complex resonant tunneling diode structures. The design prioritizes ease of fabrication and integration over maximizing individual device performance
3Use of energy by moving object
If disorder is introduced in semiconductor surfaces, then optical absorption in visible and infrared spectrum is enhanced, but conduction state distribution becomes less controlled
Solution Approach 1:
The patent introduces localized surface states at specific regions of the semiconductor structure to enhance optical absorption in the visible and infrared spectrum, while maintaining well-controlled bulk conduction bands. The surface modification is applied locally rather than throughout the entire structure, preserving the controlled conduction state distribution in the bulk
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The layer exhibits discrete conduction states above the mobility edge, providing multilevel characteristics, limited carrier mobility, and stable operation with multiple turn-on voltages, facilitating easy thickness control and low-temperature fabrication.
Implementation Method 1
resonance energy matching between crystalline regions and amorphous regions occurs
Implementation Method 2
each of the crystalline regions may have a nanometer size. The crystalline regions may exhibit a quantum confinement effect.
Data Source
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AI summary
A layer according to one embodiment of the present invention may exhibit a first number of electron states in a low-level electron energy range in a conduction band, and exhibit a second number of electron states in a high-level electron energy range higher than the low-level electron energy level in the conduction band, wherein localized states may exist between the low-level electron energy range and the high-level electron energy level.