Multilevel Memory Cell Operation Using Reference Cells
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Solution Overview
Problem
Multilevel flash memory cells experience data retention issues due to charge leakage over time, leading to erroneous reads as the stored charge on the floating gate decreases, especially after repeated programming and erase cycles.
Innovation Solution
The method involves programming a reference cell to a threshold voltage level at least as great as the uppermost level of the data cells, performing a read operation on the reference cell, and adjusting read reference voltages based on the read operation to determine the program state of data cells, thereby reducing data retention errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multilevel flash memory cells are used to increase storage density, then memory capacity is improved, but data retention deteriorates due to charge leakage over time
Solution Approach 1:
The patent applies preliminary action by programming reference cells to a threshold voltage level at least as great as the uppermost level of data cells before performing read operations. This advance preparation allows the reference cells to serve as accurate benchmarks for determining data cell states, compensating for charge leakage effects that occur over time and improving data retention reliability while maintaining multilevel storage capacity
2Measurement precision
If reference cells are programmed to high threshold voltage levels to improve data retention, then measurement precision is improved, but device complexity increases
Solution Approach 1:
The patent uses reference cells as intermediary elements that mediate between the data cells and the read operation. These reference cells are programmed to threshold voltage levels at least as great as the uppermost data cell level, serving as stable reference points that improve the precision of data cell state determination without requiring fundamental changes to the memory array structure
Data Source
AI summary
One or more embodiments of the present disclosure provide methods, devices, and systems for operating non-volatile multilevel memory cells. One method embodiment includes programming a memory cell to one of a number of different threshold voltage (Vt) levels, each level corresponding to a program state. The method includes programming a reference cell to a Vt level at least as great as an uppermost Vt level of the number of different Vt levels, performing a read operation on the reference cell, and determining a number of read reference voltages used to determine a particular program state of the memory cell based on the read operation performed on the reference cell.


