Multi-Level Memory Cell Sensing with Stepped Voltage Waveforms

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current memory devices face challenges in accurately sensing and storing multiple bits of information in multi-level cells due to environmental dependencies and inefficiencies in determining cell states, which affect data reliability and throughput.

Innovation Solution

The implementation of a multi-level cell memory device with a stepped voltage generator, sense amplifiers, and a reference current generator that uses independent on-chip voltage reference circuits and current mirrors to accurately determine cell states by comparing drain currents to a fixed reference current, allowing for reliable programming and reading of multiple bits per cell, regardless of environmental conditions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If multi-level cells are used to store multiple bits per cell, then information density is improved, but measurement precision deteriorates due to difficulty in accurately determining cell states

Engineering Contradiction:
Improveinformation densityVSAvoidcell state determination accuracy
Core Design Contradiction:
Quantity of substanceVSMeasurement precision

Solution Approach 1:

The sensing operation is segmented into multiple discrete steps, each comparing the cell current to a reference current at a different voltage level. For a 4-level cell, three separate sensing steps are performed with incrementally increasing voltages, allowing the cell state to be determined through a sequence of binary comparisons rather than a single complex measurement.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The voltage parameter is changed incrementally across sensing steps. Each sensing step operates at a different voltage level (V1, V2, V3), and the cell current is compared to a reference current that corresponds to that voltage level. This parameter variation enables accurate determination of which voltage threshold the cell has crossed, thereby identifying its state.

Inventive Principle:
Principle #35Parameter changes

2Device complexity

If environmental dependencies are not compensated, then device complexity is reduced, but reliability deteriorates due to inaccurate sensing under varying conditions

Engineering Contradiction:
Improvesensing circuit complexityVSAvoiddata storage reliability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

A reference cell is introduced as an intermediary element that experiences the same environmental conditions as the data cell but does not store user data. The reference cell's current serves as a dynamic reference that automatically compensates for environmental variations such as temperature and process differences, allowing accurate sensing without complex compensation circuits.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The reference cell automatically tracks and compensates for environmental variations without requiring external control or complex circuitry. By being subjected to identical environmental conditions and having its current mirrored to the sensing circuit, the reference cell self-adjusts to provide accurate reference values under varying temperatures, process conditions, and aging effects.

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution enables accurate and reliable storage of multiple bits per cell, improving data throughput and reliability by ensuring consistent state determination across varying environmental conditions, and enhancing the performance of memory devices.

Implementation Method 1

a current mirror having reference current averaging, the current mirror including a first transistor configured to receive the reference current and a second transistor configured to mirror a drain current of the first transistor to the bitline

Methodology Applied
Scientific EffectCurrent mirror:

Implementation Method 2

a capacitor coupled to the current mirror and configured to average a reference current

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS7551489B2Multi-level memory cell sensing
Publication Date: 2009.06.23 SK HYNIX NAND PRODUCT SOLUTIONS CORP
  • US7551489B2 patent drawing
  • US7551489B2 patent drawing
  • US7551489B2 patent drawing

AI summary

A multi-level cell memory device performs a read by providing a stepped voltage waveform on a wordline, and comparing cell currents to a substantially constant reference current. Prior to the application of the stepped voltage waveform, the wordline may share charge with another circuit node.