Multilevel Microfluidic Device via Epitaxial Growth
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Solution Overview
Problem
Existing multilevel microfluidic devices fabricated using wafer bonding are material inefficient, require multiple silicon wafers, and suffer from poor alignment resolution, making them less compact and less sensitive for applications requiring high structural resolution.
Innovation Solution
A multilevel microfluidic device is fabricated without wafer bonding, using a stack of silicon-based layers deposited or grown on a substrate, with intermediate layers separating fluidic layers, allowing for higher alignment resolution and compactness, and enabling multiple fluid inlets and outlets, achieved through deposition or growth techniques like chemical vapor deposition and epitaxial growth.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If wafer bonding is used to fabricate multilevel microfluidic devices, then multiple silicon wafers can be bonded together to form multilevel structures, but material efficiency deteriorates and alignment resolution becomes poor
Solution Approach 1:
The patent merges multiple microfluidic layers into a single silicon wafer substrate using through-silicon vias (TSVs) and bonding pads. Instead of bonding separate wafers together, all levels are integrated within one wafer, eliminating the need for multiple wafers and improving material efficiency while achieving high alignment precision through the wafer's inherent structural integrity.
Solution Approach 2:
The patent transitions from a planar 2D wafer bonding approach to a 3D vertical integration approach using through-silicon vias. Fluidic structures are stacked vertically across multiple levels within the same wafer thickness, enabling high alignment resolution through precise via positioning while reducing material consumption by eliminating the need for multiple separate wafers.
2Volume of moving object
If wafer bonding is used to form multilevel microfluidic devices, then multiple levels can be achieved, but device compactness deteriorates and manufacturing complexity increases
Solution Approach 1:
The patent implements a nested structure where multiple levels of microfluidic channels and chambers are stacked vertically within a single wafer. Each level is separated by intermediate layers and connected through through-silicon vias, creating a compact nested architecture that maximizes device functionality within minimal footprint while simplifying manufacturing by eliminating wafer bonding steps.
3Manufacturing precision
If wafer bonding is used to fabricate multilevel devices, then multiple silicon wafers can be bonded, but alignment precision deteriorates and scaling down becomes difficult
Solution Approach 1:
The patent segments the wafer into distinct functional levels separated by intermediate layers, with each level containing specific microfluidic structures. Through-silicon vias are precisely positioned to connect corresponding features across levels, enabling high alignment precision through systematic segmentation while maintaining ease of manufacture through standardized fabrication processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in a more compact, sensitive, and scalable microfluidic device with higher structural resolution and reduced material consumption, eliminating the need for wafer bonding and improving alignment precision.
Implementation Method 1
achieved through deposition or growth techniques like chemical vapor deposition and epitaxial growth
Implementation Method 2
achieved through deposition or growth techniques like chemical vapor deposition and epitaxial growth
Data Source
AI summary
A multi-level microfluidic device is provided. The device includes a silicon wafer substrate and a stack of layers arranged on the silicon wafer substrate. The stack comprises a plurality of fluidic silicon layers, wherein each fluidic silicon layer includes a microfluidic structure at least one intermediate layer. The at least one intermediate layer is arranged between two fluidic silicon layers, and a fluid inlet and a fluid outlet in fluid connection with at least one of the fluidic silicon layers. Each layer in the stack is formed by deposition or growth. Methods for manufacturing microfluidic devices is also provided.