Oxide-Bonded Multilevel Semiconductor Layers for Crack-Free Integration
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Solution Overview
Problem
Current methods for constructing RGB LEDs, image sensors, displays, and solar cells face challenges such as high costs, inefficiencies, and thermal expansion coefficient mismatches, leading to issues like cracking and limited spectral capture, which hinder the development of more efficient and cost-effective devices.
Innovation Solution
The use of smart layer transfer techniques, including ion-cut, ELTRAN, and oxide-to-oxide bonding, allows for the construction of multi-level semiconductor devices with integrated circuits and optical waveguides, enabling the creation of efficient RGB LEDs, image sensors, and solar cells at lower temperatures and reducing material limitations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional bonding methods are used to construct multi-level semiconductor devices, then device integration is achieved, but thermal expansion coefficient mismatches cause cracking and reliability issues
Solution Approach 1:
The patent introduces an intermediary oxide layer between semiconductor layers with different thermal expansion coefficients. This oxide bonding layer acts as a stress-absorbing interface that accommodates thermal expansion mismatches during temperature cycling, preventing cracking while maintaining bond strength. The oxide layer serves as a compliant intermediary that resolves the thermal compatibility issue between dissimilar materials.
Solution Approach 2:
The patent changes the bonding parameters by performing oxide-to-oxide bonding at lower temperatures (e.g., 400-600°C) compared to traditional direct semiconductor bonding. This temperature parameter change reduces thermal stress accumulation and allows for more gradual thermal expansion, preventing crack formation while still achieving strong bonds between layers.
2Strength
If high-temperature processing is used to bond semiconductor layers, then strong bonds are formed, but material limitations and device damage occur
Solution Approach 1:
The patent fundamentally changes the bonding temperature parameter from high-temperature (e.g., >1000°C) to low-temperature (400-600°C) processing. This parameter change enables bonding of temperature-sensitive materials and pre-fabricated devices without thermal damage, while the oxide bonding mechanism ensures sufficient bond strength is achieved at these lower temperatures through oxide-oxide chemical bonding.
Solution Approach 2:
The patent replaces traditional mechanical or direct semiconductor bonding mechanisms with oxide-to-oxide chemical bonding. This substitution allows bonding to occur at lower temperatures by utilizing the chemical reactivity of oxide surfaces, which form strong covalent bonds at reduced thermal energy levels, avoiding the need for high-temperature processing.
3Manufacturing precision
If conventional layer transfer techniques are used, then monocrystalline films are deposited, but process complexity and manufacturing costs increase
Solution Approach 1:
The patent merges multiple separate layer transfer operations into a single oxide bonding step. By preparing oxide layers on both substrates beforehand and performing one bonding operation, the process eliminates intermediate steps such as temporary substrate attachment, alignment, and sequential bonding, thereby reducing overall process complexity while maintaining monocrystalline film quality.
Solution Approach 2:
The patent performs preliminary oxidation of substrate surfaces before the bonding step. This preliminary action prepares the surfaces for low-temperature oxide-to-oxide bonding, ensuring proper chemical composition and surface morphology are established in advance, which simplifies the subsequent bonding process and reduces the need for complex in-situ processing.
4Adaptability or versatility
If multiple separate devices are manufactured and assembled, then device functionality is achieved, but production costs and assembly complexity increase
Solution Approach 1:
The patent merges multiple separate device fabrication processes into a single monolithic integration structure. By bonding complete functional layers (such as LED structures, photodetectors, and waveguides) directly to each other through oxide interfaces, the patent eliminates separate assembly steps, reduces production costs, and enables wafer-scale manufacturing of complex multi-functional devices.
Solution Approach 2:
The patent creates a universal oxide bonding platform that can accommodate various semiconductor materials and device types (III-V semiconductors, silicon, organics, etc.). This universal approach allows different functional devices to be integrated onto a single substrate using the same bonding methodology, reducing manufacturing complexity and enabling cost-effective production of multi-functional integrated systems.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the production of more efficient and cost-effective RGB LEDs, image sensors, and solar cells by overcoming thermal expansion issues and allowing for the integration of multiple layers without high-temperature processing, thereby improving device performance and reducing production costs.
Implementation Method 1
an oxide layer disposed between the first level and the second level, where the second level is bonded to the oxide layer, and where the bonded includes oxide to oxide bonds
Data Source
AI summary
A multi-level semiconductor device, the device including: a first level including integrated circuits; a second level including a structure designed to conduct electromagnetic waves, where the second level is disposed above the first level, where the integrated circuits include single crystal transistors; and an oxide layer disposed between the first level and the second level, where the integrated circuits include at least one memory circuit, where the second level is bonded to the oxide layer, and where the bonded includes oxide to oxide bonds.


