Multilevel Power Converter Reducing Switch Count and DC Supply Complexity

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Solution Overview

Problem

Conventional multilevel power conversion circuits suffer from high steady-state ON-state loss and inefficiency due to multiple semiconductor switches carrying output current, and require multiple independent DC power supplies, making them costly and difficult to downsize.

Innovation Solution

A multilevel power converter design that reduces the number of semiconductor switches carrying current from six to four, using a DC power supply assembly with only two single DC power supplies, and employs capacitors and bidirectional switches to generate seven levels of output voltage, thereby reducing power loss and simplifying production.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If multiple semiconductor switches (six switches) are used to generate multilevel output voltage, then the output voltage levels can be achieved, but the steady-state ON-state loss increases and conversion efficiency deteriorates

Engineering Contradiction:
Improveoutput voltage levelsVSAvoidsteady-state ON-state loss
Core Design Contradiction:
PowerVSLoss of energy

Solution Approach 1:

The patent introduces capacitors as intermediary energy storage elements to generate multilevel output voltages. Instead of using multiple semiconductor switches in series, the capacitors store and release energy to create different voltage levels at the output, thereby reducing the number of switches that need to carry output current and minimizing steady-state ON-state losses

Inventive Principle:
Principle #24Intermediary (Mediator)

2Power

If multiple single DC power supplies are used, then the required voltage levels can be provided, but the device complexity and production cost increase

Engineering Contradiction:
Improvevoltage levelsVSAvoidnumber of DC power supplies
Core Design Contradiction:
PowerVSDevice complexity

Solution Approach 1:

The patent makes the capacitors serve multiple functions: they act as energy storage elements, voltage reference points, and output voltage generators. By using capacitors that can provide multiple voltage levels through their charging and discharging cycles, the system eliminates the need for multiple independent DC power supplies, thereby reducing device complexity and production costs

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Power

If multiple single DC power supplies are used, then the voltage levels can be maintained, but the device size and production cost increase

Engineering Contradiction:
Improvevoltage levelsVSAvoiddevice size
Core Design Contradiction:
PowerVSVolume of moving object

Solution Approach 1:

The patent merges the functions of multiple DC power supplies into a single DC power supply combined with capacitive energy storage elements. The capacitors consolidate the role of multiple voltage sources by storing energy at different voltage levels and releasing it as needed, thereby reducing the overall device size and eliminating the need for multiple separate power supply units

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentEP2651024B1Multilevel power converter
Publication Date: 2018.10.31 FUJI ELECTRIC CO LTD
  • EP2651024B1 patent drawingFigure 1
  • EP2651024B1 patent drawingFigure 2
  • EP2651024B1 patent drawingFigure 3

AI summary

A multilevel power converter of the present invention comprises: a DC power supply assembly having a positive terminal, a negative terminal, and a zero terminal; a first semiconductor switch series circuit composed of first through sixth semiconductor switches connected in series between the positive terminal and the negative terminal; a second semiconductor switch series circuit composed of a first bidirectional switch, seventh and eighth semiconductor switches, and a second bidirectional switch connected in series between the connection point of the first and second semiconductor switches and the connection point of the fifth and sixth semiconductor switches; a first capacitor connected in parallel with a series circuit of the third and fourth semiconductor switches; and a second capacitor connected in parallel with the second semiconductor switch series circuit; wherein the zero terminal is connected to the connection point of the seventh and eighth semiconductor switches and an AC terminal is connected to the connection point of the third and fourth semiconductor switches.