Multilevel Signal Driver Circuit for Eye Margin Improvement
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Solution Overview
Problem
Semiconductor devices face challenges in maintaining signal integrity when transitioning from NRZ signals to multilevel signals due to reduced eye margin, which affects data transmission efficiency.
Innovation Solution
The implementation of a driver circuit with a higher number of pull-up transistors than pull-down transistors, connected in series, and an equalizer circuit to adjust control signal pulse widths, enhancing signal integrity by minimizing eye margin degradation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multilevel signals are used to increase data transmission speed, then productivity is improved, but reliability deteriorates due to reduced eye margin
Solution Approach 1:
The patent changes the voltage level parameters by introducing a first power supply voltage (VDD1) and a second power supply voltage (VDD2) with different voltage levels. The driver circuit uses these different voltage levels to generate multilevel signals, where the voltage difference between power supply nodes creates distinct signal levels that improve eye margin while maintaining high transmission speed
Solution Approach 2:
The patent introduces asymmetry in the power supply structure by using different voltage levels for different parts of the driver circuit. Specifically, the first power supply voltage is applied to the first power node while the second power supply voltage is applied to the second power node, creating an asymmetric voltage distribution that enables improved signal level differentiation
2Reliability
If the number of pull-up transistors is increased to improve signal levels, then reliability is improved, but device complexity increases
Solution Approach 1:
The patent segments the driver circuit into multiple independent transistor groups, each controlled by separate control signals. The first and second pull-up transistors are controlled by different control signals, allowing independent optimization of each segment's contribution to the output signal, thereby improving eye margin through structured complexity
Solution Approach 2:
The driver circuit is designed to perform multiple functions using the same basic transistor structures. The same pull-up and pull-down transistor configurations are used to generate different voltage levels (first and second signal levels) by simply changing the control signal states, making the circuit multi-functional without requiring entirely separate transistor sets for each function
Data Source
AI summary
A semiconductor device is provided. The semiconductor device includes: an equalizer circuit configured to output a first control signal corresponding to a first bit of original two-bit data and a second control signal corresponding to a second bit of the original two-bit data; and a driver circuit including a plurality of pull-up transistors connected between an output node and a first power node configured to provide a first power supply voltage, and a plurality of pull-down transistors connected between the output node and a second power node configured to provide a second power supply voltage, wherein the second power supply voltage is lower than the first power supply voltage, and the driver circuit is connected to the equalizer circuit in series. The plurality of pull-up transistors includes a first pull-up transistor and a second pull-up transistor connected to each other in parallel, between the first power node and the output node, and a third pull-up transistor and a fourth pull-up transistor connected to each other in series, between the first power node and the output node.