Multilevel Signaling Image Sensor Data Bus Area Reduction
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Solution Overview
Problem
CMOS image sensors face challenges in increasing data transfer efficiency over a data bus while minimizing silicon area, leading to larger die sizes due to increased data bus frequency and analog-to-digital converter requirements.
Innovation Solution
The implementation of an image sensor with 1-bit storage devices generating weighted sum signals with multiple levels, compared to reference signals using a comparator array, to efficiently convert pixel signals into digital codes, reducing the need for silicon area by transmitting weighted sum signals over data buses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If data bus frequency is increased to improve data transfer efficiency, then data transfer efficiency is improved, but data transmission reliability deteriorates due to interference during transmission
Solution Approach 1:
The patent segments the data bus into multiple channels (e.g., even and odd channels) and assigns different data streams to each channel. This segmentation allows simultaneous data transmission on multiple channels, improving overall data transfer efficiency while maintaining reliability through channel diversity that reduces interference impact on any single channel.
2Measurement precision
If ADC resolution is increased and multi-channel data bus is used to improve image quality, then image quality is improved, but silicon area increases due to larger ADC and data bus requirements
Solution Approach 1:
The patent merges multiple data channels into a single shared data bus by time-division multiplexing. Different channels transmit data at different times on the same physical bus, eliminating the need for separate dedicated data buses for each channel. This significantly reduces the silicon area required for data bus routing while maintaining the ability to handle high-resolution multi-channel data.
Solution Approach 2:
The single data bus is designed to serve multiple functions and multiple channels sequentially. The same physical data bus infrastructure is reused across different channels and time periods, making the data bus system universal rather than dedicated to single channels. This multi-functionality reduces redundant infrastructure and minimizes silicon area consumption.
3Productivity
If more silicon area is allocated to data bus and ADC to improve performance, then data transfer capability is improved, but die size increases reducing gross die or net die
Solution Approach 1:
The patent introduces the time dimension to data transmission by implementing time-division multiplexing. Instead of allocating more spatial resources (wider data buses) to increase data transfer capability, the system uses multiple time slots on a narrower bus. This dimensional shift from spatial to temporal resource allocation maintains data transfer capability while reducing silicon area consumption.
Data Source
AI summary
An image sensor includes a pixel array configured to generate a plurality of pixel signals, an analog to digital converter circuit coupled to the pixel array and configured to generate respective digital codes responsive to respective ones of the pixel signals, a plurality of memories, respective ones of which are configured to store respective bits of the digital codes, a signal processing circuit coupled to a plurality of memories and configured to generate analog signals responsive to the stored bits, each of the analog signals corresponding to multiple ones of the stored bits, and a comparator circuit configured to compare the analog signals to respective ones of a plurality of reference signals to generate digital signals corresponding to the multiple ones of the stored bits. Related image processing systems and methods are also described.