Multilevel Package Substrate Filter to Save Die and PCB Area
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Solution Overview
Problem
Existing electronic circuits face challenges in integrating filters on-chip, which increases die area, and off-chip filters increase the area of host printed circuit boards and add costs, particularly in high-speed systems like RF amplifiers and serdes.
Innovation Solution
A multilevel package substrate with integrated filter circuits, including capacitors and inductors, is used to conserve die area and reduce host PCB space by incorporating filter components within the package substrate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If filter circuits are integrated on-chip, then die area is increased, but off-chip filters increase host PCB area and add cost
Solution Approach 1:
The patent implements filter circuits using multilevel package substrate technology, transitioning from planar 2D layout to 3D vertical stacking. Multiple metal layers are stacked vertically with dielectric materials between them, allowing filter components to be arranged in three dimensions rather than confined to a single plane. This dimensional transition enables compact filter integration that reduces both die area and host PCB area simultaneously.
Solution Approach 2:
The patent embeds filter circuits within the package substrate structure itself, nesting the filter functionality inside the existing package architecture. The filter components are integrated within the multilevel substrate layers, effectively placing one system (filter) inside another (package substrate), thereby eliminating the need for separate off-chip filter components and reducing overall system footprint.
2Ease of manufacture
If filter circuits are integrated on-chip, then die area is increased, but off-chip filters add cost to qualify and purchase passive components
Solution Approach 1:
The patent combines filter circuit functionality with the package substrate structure by forming filter components using the same metal layers and dielectric materials that constitute the substrate itself. This merging eliminates the need for separate passive components, reducing both the number of parts and assembly steps. The filter circuits are manufactured as an integral part of the package substrate through standard semiconductor fabrication processes, thereby reducing manufacturing cost and complexity.
Solution Approach 2:
The multilevel package substrate serves multiple functions simultaneously: it provides mechanical support for the semiconductor die, enables electrical interconnections between components, and integrates filter circuit functionality. This multi-functionality eliminates the need for dedicated filter components, reducing the total component count and manufacturing complexity while maintaining all necessary functions within a single integrated structure.
3Area of moving object
If filter circuits are integrated on-chip, then die area is increased, but off-chip filters increase host PCB area
Solution Approach 1:
The patent implements filter circuits using multilevel package substrate technology, transitioning from planar 2D layout to 3D vertical stacking. Multiple metal layers are stacked vertically with dielectric materials between them, allowing filter components to be arranged in three dimensions rather than confined to a single plane. This dimensional transition enables compact filter integration that reduces both die area and host PCB area simultaneously.
Data Source
AI summary
A method of fabricating an electronic device includes forming a multilevel package substrate, a semiconductor die, and a package structure, the multilevel package substrate having a first level, a second level, and a filter circuit in the first and second levels. The filter circuit includes a filter input terminal, a first capacitor, a first inductor, a second capacitor, a second inductor, a filter output terminal, and a reference terminal. The semiconductor die is attached to the multilevel package substrate and has a conductive structure coupled to one of the terminals of the filter circuit, and the package structure encloses the semiconductor die and a portion of the multilevel package substrate.