Multi-Level Transmitter Edge Timing for Switching Jitter Reduction

Solution Overview

Problem

As the number of levels in multi-level signaling increases, switching jitter also increases, leading to decreased horizontal eye opening and timing margin in semiconductor devices and interfaces.

Innovation Solution

A transmitter and transceiver system that includes an encoder, an edge adjustment circuit, and a driver circuit. The edge adjustment circuit adjusts the falling edge timing of the encoded signal corresponding to the most significant bit and the rising edge timing of the encoded signal corresponding to the least significant bit, thereby reducing switching jitter.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of information

If multi-level signaling with increased number of levels is used to transmit more information, then information transmission capacity is improved, but switching jitter increases and timing margin decreases

Engineering Contradiction:

Improveinformation transmission capacityVSAvoidtiming margin

Core Design Contradiction:

Loss of informationVSReliability

Solution Approach 1:

The edge adjustment circuit performs preliminary timing adjustment on the encoded signals before they are transmitted. By adjusting the timing of edges in advance, the system compensates for potential timing issues that would otherwise degrade the eye diagram and reduce timing margin, thereby maintaining reliability while enabling higher information capacity through multi-level signaling

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The system changes the timing parameters of the encoded signals by adjusting edge timing through the edge adjustment circuit. This parameter adjustment optimizes the signal characteristics to reduce switching jitter and improve the eye diagram opening, allowing the system to maintain timing margin even when using higher-level multi-level signaling schemes

Inventive Principle:

Principle #35Parameter changes

2Loss of information

If multi-level signaling with increased number of levels is used to transmit more information, then information transmission capacity is improved, but switching jitter increases

Engineering Contradiction:

Improveinformation transmission capacityVSAvoidswitching jitter

Core Design Contradiction:

Loss of informationVSLoss of time

Solution Approach 1:

The edge adjustment circuit performs preliminary timing adjustment on the encoded signals before they are transmitted. By adjusting the timing of edges in advance, the system compensates for potential timing issues that would otherwise degrade the eye diagram and reduce timing margin, thereby maintaining reliability while enabling higher information capacity through multi-level signaling

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The system changes the timing parameters of the encoded signals by adjusting edge timing through the edge adjustment circuit. This parameter adjustment optimizes the signal characteristics to reduce switching jitter and improve the eye diagram opening, allowing the system to maintain timing margin even when using higher-level multi-level signaling schemes

Inventive Principle:

Principle #35Parameter changes

Data Source

PatentUS20250070914A1Transmitter and transceiver with switching jitter improvement

Publication Date: 2025.02.27 SAMSUNG ELECTRONICS CO LTD

AI summary

Disclosed are a transmitter and transceiver for improving switching jitter. The transmitter includes an encoder that encodes an input signal representable by x levels (where x is a natural number of 3 or more) and outputs a plurality of encoded signals representing a multi-bit binary number including a most significant bit and a least significant bit; an edge adjustment circuit that generates a plurality of adjusted encoded signals by adjusting a falling edge timing of a first one of the encoded signals corresponding to the most significant bit and adjusting a rising edge timing of a second one of the encoded signals corresponding to the least significant bit; and a driver circuit that generates and outputs an output signal having the x levels based on the adjusted encoded signals.