Multi-Level Via Structures for IC Mechanical Integrity
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Solution Overview
Problem
Conventional via interconnect layers in integrated circuits provide insufficient strength and fracture toughness, particularly in advanced logic technology nodes like 5 or 3nm, where available area for via/interconnect routing is scarce, leading to risks of cracking and delamination during chip-package interactions.
Innovation Solution
The implementation of multi-level via structures that span two or more metal levels, forming a single unitary body to reduce the number of interfaces and enhance mechanical integrity, arranged in a staggered overlapping configuration to bypass conductive paths and reduce horizontal crack propagation risks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If multi-level via structures are implemented to increase resistance to cracking and delamination, then mechanical strength and fracture toughness are improved, but device complexity increases
Solution Approach 1:
The patent implements multi-level via structures that extend through multiple interconnection levels (first, second, and third levels) rather than conventional single-level vias. These supervias span across multiple dielectric layers and conductive paths, creating a three-dimensional reinforcement network that significantly increases fracture toughness and resistance to cracking while managing the added structural complexity through systematic design
Solution Approach 2:
The via structures utilize composite material construction with different fill materials (conductive, semi-conductive, or insulating) combined with dielectric layers and conductive paths. This composite approach allows optimization of mechanical properties throughout the BEOL stack, with each layer contributing specific characteristics to enhance overall strength and crack resistance
2Strength
If via density is increased to improve fracture toughness, then mechanical strength is improved, but available routing area is reduced
Solution Approach 1:
The patent transitions from two-dimensional via distribution to three-dimensional multi-level via structures. By extending vias through multiple interconnection levels, the reinforcement effect is achieved with fewer individual via structures, preserving routing area in each individual layer while maintaining overall mechanical strength through vertical integration
Solution Approach 2:
The multi-level via structures serve multiple functions simultaneously: they provide mechanical reinforcement across multiple layers, enable electrical interconnection between non-adjacent conductive paths, and act as structural anchors for the dielectric layers. This multi-functionality reduces the need for separate reinforcement elements, preserving routing area
3Reliability
If multi-level via structures are arranged in staggered overlapping configuration to reduce horizontal crack propagation, then crack resistance is improved, but manufacturing precision requirements increase
Solution Approach 1:
The patent divides the via structure formation into discrete, manageable segments corresponding to different interconnection levels. Each multi-level via is constructed as a separate entity with defined boundaries and interfaces, allowing independent optimization and control of each segment's properties and positioning, thereby reducing the cumulative precision burden
Solution Approach 2:
The staggered overlapping arrangement of multi-level vias is designed and planned in advance during the layout phase. The positions and configurations of vias spanning different levels are predetermined to create an interlocking pattern that inherently resists horizontal crack propagation, allowing manufacturing processes to follow a pre-established precision roadmap
Data Source
Figure 1
Figure 2~3
AI summary
According to an aspect of the present inventive concept there is provided an interconnect structure (105) comprising: four interconnection levels including a respective dielectric layer and a set of conductive paths. The interconnect structure further comprises a first multi-level via structure (10) extending from a first interconnection level (100) to a third interconnection level (300) and forming a single unitary body passing through a second interconnection level (200) distant from any of the second set of conductive paths; and a second multi-level via structure (20) extending from the second interconnection level (200) to a fourth interconnection level (400) and forming a single unitary body passing through the third interconnection level (300) distant from any of the third set of conductive paths. There is further provided a method of forming a first multi-level via structure and a second multi-level via structure in an interconnect structure.