Multimaster Serial Bus Fault Recovery via Director Device
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Solution Overview
Problem
Multimaster serial single-ended bus systems, such as I2C, face limitations in fault recovery due to devices holding SDA or SCL lines low, preventing director nodes from sending START or STOP commands, leading to bus failures without dedicated reset pins.
Innovation Solution
A director device with a central processing unit, field programmable gate array, and management module transmits SDA recovery signals, clock pulses, and power cycles to faulted connected devices, implementing reset, clock, SDA, and power recovery logic to restore bus functionality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If peripheral devices are connected to the I2C bus without dedicated reset pins, then device complexity is reduced, but fault recovery capability deteriorates when devices hold SDA or SCL lines low
Solution Approach 1:
The director device acts as an intermediary between the faulted peripheral device and the bus master. It monitors the SDA and SCL lines, detects fault conditions where peripherals hold lines low, and implements recovery logic to release these lines, thereby enabling fault recovery without requiring dedicated reset pins on each peripheral device
Solution Approach 2:
The director device performs multiple functions: normal I2C bus monitoring, fault detection, fault recovery, and coordination of reset operations. By consolidating these functions in a single device, the system achieves reliable fault recovery across all peripheral devices without requiring each peripheral to have its own dedicated reset pin
2Ease of manufacture
If the I2C bus uses open-drain lines pulled up with resistors, then ease of manufacture is improved, but the bus becomes vulnerable to faults where devices can hold lines low preventing START/STOP commands
Solution Approach 1:
The director device continuously monitors the SDA and SCL lines for abnormal low states that indicate peripheral faults. When a fault is detected, the system implements feedback-driven recovery logic that identifies the faulted device and coordinates release of the bus lines, ensuring continuous bus functionality while maintaining the simple open-drain architecture
3Device complexity
If no dedicated reset pins are provided on peripheral devices, then device complexity and cost are reduced, but the ability to recover from faults deteriorates
Solution Approach 1:
The director device provides self-service fault recovery for all peripheral devices on the bus. It automatically detects when a peripheral is holding SDA or SCL low, identifies the faulted device, and coordinates the release of bus lines without requiring any active reset pin or intervention from the faulted peripheral itself
Data Source
AI summary
A system to recover a multimaster serial single-ended bus and a faulted connected device includes a director device connected to the faulted connected device via the multimaster serial single-ended bus. The director device includes a central processing unit, a field programmable gate array, and a management module in communication with the faulted connected device, the management module configured to recover the faulted connected device and the multimaster serial single-ended bus. The management module may transmit a clock pulse to the faulted connected device if the faulted connected device is holding a data line (SDA) low, transmit a stop command to the faulted connected device if the faulted connected device is holding SDA low and/or read and compare a register value in the faulted device against an expected value to determine if the faulted device and the multimaster serial single-ended bus have been recovered.