Multimedia Signal Processing Power Optimization via Asynchronous RPC
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Solution Overview
Problem
Multimedia applications in mobile devices consume excessive power due to high computational complexity, leading to reduced battery life, especially with the adoption of 5G technology, and existing solutions primarily target voice call use cases, neglecting other media types like audio and video.
Innovation Solution
Implementing media codecs on a Central Processing Unit (CPU) with Single Instruction Multiple Data (SIMD) extensions and pre/post-processing modules, such as deblocking filtering and noise reduction, on a Digital Signal Processor (DSP) or Very Long Instruction Word (VLIW) core in a pipelined manner between the CPU and DSP/VLIW core using asynchronous Remote Procedure Call (RPC) mechanisms, reducing current consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If media codecs and pre/post processing modules are implemented on CPU with SIMD extensions, then processing capability is improved, but power consumption increases
Solution Approach 1:
The system segments the multimedia processing workload by separating media codec functions (implemented on CPU with SIMD extensions) from pre/post processing modules (implemented on DSP/VLIW core). This segmentation allows each processor type to handle tasks matching its architectural strengths, improving overall processing efficiency while managing power consumption through specialized hardware acceleration rather than general-purpose CPU execution.
Solution Approach 2:
An asynchronous Remote Procedure Call (RPC) mechanism acts as an intermediary between the CPU and DSP/VLIW core, enabling non-blocking communication and coordinated processing. This intermediary allows the CPU to initiate processing tasks and receive results without waiting for completion, improving throughput and processing capability while the DSP handles power-intensive pre/post processing operations independently.
2Productivity
If computational complexity is increased to support 5G multimedia applications, then data rate and functionality are improved, but battery life is reduced
Solution Approach 1:
The system changes the operational parameters by implementing pre/post processing modules on a DSP/VLIW core rather than executing them on the CPU. This parameter change in processing architecture enables the system to handle high computational complexity required for 5G multimedia applications while reducing power consumption, as DSPs are optimized for signal processing tasks and can execute these operations more efficiently than general-purpose CPUs.
Solution Approach 2:
By segmenting the processing workload between CPU and DSP/VLIW core, the system can support complex 5G multimedia functionalities (high data rate) while offloading power-intensive operations to the specialized processor. This segmentation maintains high productivity through enhanced processing capability while extending battery life by reducing overall system power consumption through architectural optimization.
3Device complexity
If synchronous RPC mechanism is used between CPU and DSP/VLIW core, then coordination is simplified, but processing efficiency is reduced
Solution Approach 1:
The system employs asynchronous RPC mechanisms that enable non-blocking, periodic communication between CPU and DSP/VLIW core. Instead of synchronous waiting, the CPU can initiate tasks and continue processing while the DSP executes pre/post processing operations independently. This asynchronous periodic action improves processing efficiency by eliminating idle waiting time, allowing both processors to operate at full utilization without complex synchronous coordination.
Data Source
AI summary
The present invention provides a system and method for optimizing power consumption in Multimedia Signal Processing in mobile devices. The system comprises a Media (speech, audio, image, and video) codec encoder module, a Media codec decoder module (106) and pre-processing and postprocessing (filtering, deblocking filter, Analytics, person detect, keyword/keyframe spotting) modules modules. The pre-processing and post-processing modules are implemented on a DSPNLIW processor, while the Media encoder and decoder modules are implemented on a CPU with SIMD extensions. This pipeline (asynchronous RPC, non-blocking) implementation of modules in multi-core reduces current consumption in the SoC by up to 50 percent compared to an implementation of the modules in a multiple CPU/DSP/VLIW core with synchronous RPC (blocking). The significant reduction in current consumption of the modules enables reduction of power consumption in the Multimedia processing use case. Thus, the invention provides a simple method of optimizing power consumption by multi core implementation of the modules in real world use case using Multimedia Signal Processing in mobile devices.