Multi-Mode LUT Routing to Reduce PLD Propagation Delay
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Solution Overview
Problem
Conventional programmable logic devices (PLDs) face increased complexity and propagation delays as the number of input signals to look-up tables (LUTs) increases, with large LUTs exhibiting larger delays than dedicated small LUTs when implemented as multiple small LUTs.
Innovation Solution
Implementing multi-mode LUTs in PLDs that can operate as a single LUT or a plurality of LUTs, allowing direct connection to routing resources without additional multiplexer stages, thereby reducing propagation delay.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a large LUT is used to implement multiple small LUTs, then the number of input signals that can be handled is increased, but the propagation delay increases
Solution Approach 1:
The large LUT is segmented into multiple smaller LUTs (e.g., two 5-input LUTs from a 6-input LUT) that can operate independently with reduced propagation delay. Each small LUT handles a subset of input signals, eliminating the need for additional multiplexer stages and reducing overall delay while maintaining the capability to handle multiple input signals.
Solution Approach 2:
The LUT structure is made dynamic and reconfigurable, allowing it to switch between operating as a single large LUT or as multiple smaller LUTs based on the specific logic function requirements. This dynamic configuration enables optimization of propagation delay for different input signal combinations without sacrificing the ability to handle large numbers of inputs when needed.
2Quantity of substance
If a large LUT is used to implement multiple small LUTs, then the input capacity is increased, but the overall complexity increases
Solution Approach 1:
A single reconfigurable LUT structure serves multiple functions - it can operate as one large LUT for complex logic functions requiring many inputs, or as multiple smaller LUTs for simpler functions. This multi-functionality eliminates the need for separate dedicated LUTs for different input capacities, reducing device complexity while maintaining high input capacity flexibility.
Solution Approach 2:
The LUT configuration is dynamically adjustable based on design requirements, allowing the same physical structure to adapt between different operational modes. This dynamic reconfigurability reduces the need for multiple fixed-configuration LUTs, thereby reducing overall device complexity while preserving the ability to handle various input capacities.
3Device complexity
If conventional LUTs are used, then the structure is simple, but the flexibility to operate in different modes is limited
Solution Approach 1:
The LUT is designed with dynamic reconfigurability, allowing it to change its operational mode (single LUT or multiple LUTs) based on the specific logic function being implemented. This dynamic capability provides high operational flexibility while maintaining a relatively simple underlying structure that can adapt to different configurations through control logic.
Solution Approach 2:
A single LUT structure is designed to perform multiple functions - it can operate as a large LUT for complex functions or as multiple smaller LUTs for simpler functions. This universal design provides operational flexibility across different scenarios without requiring multiple specialized structures, thus maintaining simplicity while enhancing adaptability.
Data Source
AI summary
Various techniques are provided for implementing one or more multi-mode look-up tables (LUTs) in programmable logic devices (PLDs). In one example, a PLD includes a multi-mode LUT. The comprising: a plurality of input nodes configured to receive a plurality of input signals; wherein the multi-mode LUT is configurable to selectively operate in a first mode as a single LUT or in a second mode as dual LUTs and generate a plurality of output signals in accordance with one or more logic functions in response to the input signals; and a plurality of output nodes configured to provide the plurality of output signals simultaneously to routing resources of the PLD.