Multi-Mode NVMeoF Storage Using U.2 Lanes for Multipath Access
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Solution Overview
Problem
Existing NVMe and NVMeoF technologies face inefficiencies in utilizing the PCIe bus lanes, leading to underutilization and requiring additional hardware for multi-path and multi-mode operations, which increases costs and deployment time.
Innovation Solution
A multi-mode NVMeoF device that can operate in both NVMe and NVMeoF modes, utilizing a U.2 connector to share PCIe lanes for data and control signals, and SAS pins for Ethernet ports, enabling self-configuration and supporting high availability (HA) and non-HA modes with minimal hardware changes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a U.2 connector is used to interface with a system via PCIe bus, then the storage device can be connected to the system, but only two lanes of the four-lane PCIe signals are consumed by Ethernet ports, leaving the remaining two lanes unused
Solution Approach 1:
The storage device is designed with dual functionality to operate in both NVMe mode and NVMeoF mode over Ethernet. The same U.2 connector and PCIe interface are used for both modes, with the device automatically configuring itself based on the operational mode. This multi-functionality eliminates the need for separate hardware configurations for different protocols while maintaining full PCIe lane utilization.
Solution Approach 2:
The storage device implements dynamic mode selection and self-configuration capabilities. The device can automatically detect the operational requirements and switch between NVMe and NVMeoF modes, dynamically allocating PCIe lanes and Ethernet ports as needed. This dynamic adaptability allows the same hardware to serve multiple purposes without manual reconfiguration.
2Reliability
If separate hardware is used for NVMe and NVMeoF modes, then each mode can be optimized, but the cost and deployment time increase
Solution Approach 1:
The storage device integrates both NVMe and NVMeoF protocol support within a single hardware platform. The controller is designed to handle both protocols natively, with the ability to switch between modes without requiring separate hardware units. This universal design reduces manufacturing costs by eliminating duplicate components while maintaining mode-specific optimization through software-based protocol handling.
Solution Approach 2:
The patent combines NVMe and NVMeoF functionality into a single storage device. The controller merges protocol processing capabilities, and the same physical interfaces (U.2 connector, PCIe lanes, Ethernet ports) serve both protocols. This consolidation reduces the total number of hardware units needed while preserving the performance characteristics of each mode through intelligent resource allocation.
3Reliability
If additional hardware is deployed to support multi-path operations, then high availability can be achieved, but the deployment cost and time increase
Solution Approach 1:
The storage device is pre-configured with multi-path capabilities during manufacturing. Multiple Ethernet ports and PCIe lane configurations are built-in and pre-tested, allowing the device to be deployed with high availability features enabled from the outset. The device includes pre-configured redundancy paths that can be activated without additional field hardware installation, reducing deployment time while maintaining high availability.
Solution Approach 2:
The storage device implements self-configuration capabilities for multi-path operations. Upon detection of the operational environment, the device automatically configures its internal routing, activates appropriate redundancy paths, and establishes failover mechanisms without requiring manual hardware configuration. This self-service approach enables high availability deployment while minimizing the time and expertise required for installation.
Data Source
AI summary
A system includes a fabric switch including a motherboard, a baseboard management controller (BMC), a network switch configured to transport network signals, and a PCIe switch configured to transport PCIe signals; a midplane; and a plurality of device ports. Each of the plurality of device ports is configured to connect a storage device to the motherboard of the fabric switch over the midplane and carry the network signals and the PCIe signals over the midplane. The storage device is configurable in multiple modes based a protocol established over a fabric connection between the system and the storage device.