Multimode SSD ECC Partitioning for Mixed I/O Block Sizes
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Solution Overview
Problem
Current SSDs struggle to efficiently handle different I/O block sizes, leading to under-utilization of NAND flash memory bandwidth and increased silicon implementation costs due to mismatched ECC codeword lengths.
Innovation Solution
Implement a multimode SSD architecture with a base partition using 4096B ECC codewords and non-base partitions using shorter ECC codewords, combined with a unified FTL to manage different LBA block sizes, and perform read-modify-write operations for data updates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a unified 4096B ECC codeword structure is used across all partitions, then the FTL mapping management is simplified, but NAND flash memory bandwidth is under-utilized for small I/O block sizes
Solution Approach 1:
The patent segments the storage system into different partition types (base partitions and non-base partitions) with different ECC codeword lengths. Base partitions use 4096B ECC codewords while non-base partitions use shorter ECC codewords matched to their I/O block sizes, allowing optimized bandwidth utilization for each partition type without complicating the overall FTL management.
2Productivity
If ECC codeword length is reduced for non-base partitions, then NAND bandwidth utilization improves, but silicon implementation costs increase due to mismatched ECC lengths
Solution Approach 1:
The patent applies local quality by assigning different ECC codeword lengths to different partition types based on their specific requirements. Non-base partitions use shorter ECC codewords optimized for their I/O block sizes, while base partitions use the standard 4096B ECC codewords. This localized optimization allows each partition to operate with the most efficient ECC length for its workload, improving overall bandwidth utilization without requiring a complete redesign of the ECC architecture.
3Reliability
If out-of-place data update is implemented, then NAND flash memory reliability is improved, but user experience time lag increases when cloud actions are required
Solution Approach 1:
The patent implements dynamic LBA-PBA mapping management that allows the FTL to flexibly remap logical block addresses to physical block addresses based on data access patterns and partition requirements. This dynamic capability enables the system to optimize data placement and access paths in real-time, reducing time lags for cloud actions while maintaining the reliability benefits of out-of-place updates through proper mapping management.
Data Source
AI summary
A multimode solid-state drive (SSD) and associated method. An SSD includes: a plurality of flash memory chips addressable via a physical block address (PBA); and a controller chip configured to map logical block addresses (LBAs) from a host to PBAs, wherein the controller chip is further configured to handle different LBA block sizes according to a process that includes: partitioning a base partition to store one a long code word of size Clong having a single base data block protected with error correction coding (ECC); and partitioning a set of non-base partitions, each partitioned for a plurality of shortened code words, wherein each shortened code word is configured to store a shortened data block protected with ECC, and wherein the plurality of shortened code words are configured to be protected with ECC as a combined long codeword of size Clong.