Parallel Multipath RF Filter Branches for Low-Clock Rejection
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing RF filters face challenges in efficiently attenuating frequency components at specific clock signal frequencies while maintaining signal quality and rejecting out-of-band frequencies, often requiring high clock frequencies and complex designs.
Innovation Solution
The implementation of a multipath filter with parallel filter circuit branches, each equipped with a double-in double-switched downconverter, a filter network, and an upconverter, using clock signals of the same frequency but different phases to downconvert, filter, and upconvert signals, thereby controlling the center frequency and reducing complexity and cost.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high clock frequencies are used to attenuate frequency components and reject out-of-band frequencies, then filtering performance is improved, but device complexity and cost increase
Solution Approach 1:
The filter is divided into multiple parallel filter circuit branches, each processing a specific frequency component. This segmentation allows each branch to operate at lower clock frequencies while collectively achieving the desired filtering performance, thus reducing device complexity and cost without sacrificing reliability.
Solution Approach 2:
The patent employs periodic switching actions in the downconverters and upconverters with carefully controlled phases. By using periodic actions at lower clock frequencies with multiple phases, the system achieves effective frequency component attenuation and out-of-band rejection without requiring high single-frequency clock operations, thereby reducing complexity.
2Reliability
If high clock frequencies are used to attenuate frequency components, then attenuation effectiveness is improved, but energy consumption increases
Solution Approach 1:
By segmenting the filtering function across multiple parallel branches operating at lower clock frequencies, the total energy consumption is reduced compared to a single high-frequency clock system, while maintaining effective attenuation through the combined action of all branches.
Solution Approach 2:
The patent changes the operating parameters by using multiple lower-frequency clock signals with different phases instead of a single high-frequency clock signal. This parameter change achieves the same attenuation effectiveness while reducing energy consumption.
3Reliability
If complex filter designs are used to reject out-of-band frequencies, then out-of-band rejection is improved, but manufacturing cost increases
Solution Approach 1:
The out-of-band rejection function is segmented across multiple parallel filter branches, each handling specific frequency ranges. This modular segmentation simplifies manufacturing compared to a monolithic complex filter design, as each branch can be independently manufactured and then combined.
Solution Approach 2:
Each filter circuit branch is designed with multi-functionality, serving as a downconverter, filter, and upconverter in sequence. This universal design reduces the total component count and manufacturing complexity while achieving effective out-of-band rejection through the combined operation of all branches.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for effective attenuation of frequency components at specific frequencies, improved out-of-band rejection, and reduced complexity and cost by using a relatively slow clock signal, while maintaining signal quality and suppressing even order harmonics.
Implementation Method 1
a double-in double-switched downconverter configured to generate a downconverted signal by downconverting the input signal with a pair of clock signals
Implementation Method 2
a filter network configured to filter the downconverted signal to generate a filtered signal
Implementation Method 3
an upconverter configured to upconvert the filtered signal
Data Source
AI summary
Multipath filters are provided herein. In certain configurations, a multipath filter includes multiple filter paths or circuit branches that are electrically connected in parallel with one another between an input terminal and an output terminal. The input terminal receives an input signal, and each filter circuit branch includes a double-in double-switched (DIDS) downconverter that downconverts the input signal with two different clock signal phases to generate a downconverted signal. Each filter circuit branch further includes a filter network that generates a filtered signal by filtering the downconverted signal and an upconverter that upconverts the filtered signal to generate a branch output signal. Additionally, the branch output signals from the filter circuit branches are combined to generate an output signal at the output terminal.