Multi-Phase Clock Calibration for Transmitter Distortion Correction
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Solution Overview
Problem
Current network devices employing serializer/deserializer technology struggle to meet stringent even-odd jitter compliance in high-speed communication due to pulse width distortion and other clock impairments, particularly in multi-phase clock systems, as these devices induce additional distortions like duty cycle distortion and skew that existing correction methods fail to address effectively.
Innovation Solution
A digitally-assisted transmission data pattern-based approach is employed to sense and correct distortions in the transmitter output of multi-phase clock systems, using calibration bit patterns to concurrently calibrate for skew, in-phase duty cycle distortion, and quadrature duty cycle distortion, with a calibration circuit capturing and digitizing the differential signal to generate gradient values for correcting the multi-phase clock.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If existing correction methods are used to correct clock impairments, then some distortion is corrected, but additional distortions like duty cycle distortion and skew are not addressed, failing to meet stringent EOJ compliance
Solution Approach 1:
The patent implements feedback by measuring the actual output signal from the transmitter and using this measurement to generate correction values that are applied back to the multi-phase clock signal. The calibration circuit measures distortion parameters and feeds this information back to adjust the clock phases, creating a closed-loop system that continuously corrects distortions including duty cycle distortion and skew.
Solution Approach 2:
The patent introduces a calibration circuit as an intermediary component that measures the transmitter output signal and generates correction values. This intermediary circuit acts as a mediator between the transmitter and the multi-phase clock source, extracting distortion information and translating it into corrective adjustments for the clock signal.
2Speed
If multi-phase clock systems are used for high-speed communication, then communication speed increases, but clock impairments and pulse width distortion increase, making it difficult to meet tight specifications
Solution Approach 1:
The calibration circuit continuously measures distortion in the multi-phase clock signal path and feeds back correction values to adjust the clock phases. This feedback mechanism enables the system to maintain signal integrity at high communication speeds by dynamically compensating for clock impairments and pulse width distortion that increase with speed.
Solution Approach 2:
The patent changes the parameters of the multi-phase clock signal by adjusting phase offsets and duty cycles based on measured distortion. The correction circuit modifies clock signal parameters dynamically to compensate for impairments, allowing the system to operate at high speeds while maintaining compliance with tight EOJ specifications.
3Reliability
If correction circuitry is added to address clock impairments, then distortion correction improves, but device complexity increases
Solution Approach 1:
The calibration circuit performs multiple functions: it measures distortion parameters, generates correction values, and adjusts multiple clock phases simultaneously. This multi-functional approach consolidates what would otherwise require separate correction circuits for each type of distortion, reducing overall device complexity while maintaining comprehensive distortion correction capability.
Data Source
AI summary
A device includes a transmitter to transmit serialized data within a differential direct-current (DC) signal over a differential output line, a multiplexer circuit coupled to the transmitter, and a calibration circuit coupled between the differential output line, a multi-phase clock, and the multiplexer circuit. The multiplexer circuit is to select the serialized data from ones of multiple input lines according to a multi-phase clock and pass the selected serialized data to the transmitter. The serialized data includes a calibration bit pattern. The calibration circuit is to capture and digitize the differential DC signal into a digital stream, measure an error value from the digital stream that is associated with distortion based on the calibration bit pattern, convert the error value into a gradient value, and correct one or more phases of the multi-phase clock to compensate for the distortion based on the gradient value.