Multiphase Clock Generator for Wide-Range Frequency and Phase Control
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Solution Overview
Problem
Generating a high-quality clock signal over a wide frequency range is challenging due to the complexity and circuitry requirements, which increases power consumption and die size in integrated circuits.
Innovation Solution
A system utilizing a multiphase voltage-controlled oscillator (VCO) and phase interpolator for high frequencies, and a multiphase frequency divider for low frequencies, which generates multiple signals at different phases and frequencies, allowing for phase interpolation to produce a signal with a desired frequency and phase, while reducing circuitry by switching between high and low frequency modes based on a threshold.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a wide frequency range clock generation system is implemented with separate low frequency and high frequency paths, then the frequency range coverage is improved, but the circuit complexity and die size increase
Solution Approach 1:
The patent implements a universal clock generation system where a single multiphase VCO and phase interpolator can operate across both low and high frequency ranges. By introducing a frequency divider that can be selectively enabled or disabled, the same core circuitry serves dual purposes: generating clocks directly at low frequencies and generating divided clocks at high frequencies, eliminating the need for completely separate low and high frequency paths.
Solution Approach 2:
The system dynamically switches between two operational modes based on the desired frequency range. A frequency selection mechanism enables the system to adapt its configuration: at low frequencies, the frequency divider is disabled and the VCO operates directly; at high frequencies, the frequency divider is enabled to divide the VCO output. This dynamic reconfiguration allows one set of components to serve multiple frequency ranges effectively.
2Adaptability or versatility
If multiple instances of clock generation systems are integrated into an ASIC or FPGA, then the functionality is improved, but the power consumption and die size increase
Solution Approach 1:
By creating a universal clock generation core that can operate across a wide frequency range through selective use of the frequency divider, the patent enables multiple instances to share the same design without requiring separate low and high frequency paths. This reduces the power consumption and die size when multiple instances are integrated into ASICs or FPGAs, as each instance uses a single unified circuit rather than multiple specialized circuits.
3Reliability
If a multiphase VCO and phase interpolator are used for high frequency operation, then the clock quality is improved, but the circuitry requirements increase
Solution Approach 1:
The patent makes the multiphase VCO and phase interpolator universal by enabling them to serve both low and high frequency applications. The frequency divider acts as an optional intermediary that allows the same high-quality multiphase clock generation circuitry to be used at high frequencies while also supporting low frequency operation, eliminating the need for separate circuit paths and reducing overall circuitry requirements.
Data Source
AI summary
In a high frequency mode a multiphase voltage-controlled oscillator (VCO) generates a first plurality of signals where each has the desired frequency and a different phase. A phase interpolator generates the signal at the desired frequency and the desired phase using a first plurality of signals. In a low frequency mode the VCO generates a second plurality of signals where each has a frequency which is a multiple of the desired frequency and a different phase. A multiphase frequency divider generates a third plurality of signals by dividing the frequency of the second plurality to the desired frequency while maintaining a phase relationship with the second plurality of signals. The phase interpolator generates the signal at the desired frequency and the desired phase using the third plurality.