Multi-Phase Clock Generation for Deterministic Mode Switching

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Solution Overview

Problem

Existing multi-phase signal generation systems face challenges in transitioning between different phase modes, such as eight-phase and four-phase signals, due to indeterministic phase shifts and changes in load on phase-locked loop (PLL) circuits, which can disrupt wireless communication and increase power consumption.

Innovation Solution

An apparatus and method that utilize a controller to manage mode inputs and periodic binary signals across multiple phase signal generation stages, maintaining a deterministic phase relationship and consistent load on the PLL, allowing seamless transitions between modes by using steady state signals and active periodic binary signals.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If the system transitions between different phase modes (e.g., eight-phase and four-phase signals), then the adaptability of the signal generation system is improved, but indeterministic phase shifts occur and the load on PLL circuits changes, disrupting wireless communication

Engineering Contradiction:
Improvephase mode switching capabilityVSAvoidphase relationship stability
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent applies preliminary action by pre-configuring the phase signal generation stages with mode inputs that can be set to specific states (e.g., first steady state signal or second steady state signal) before mode transitions occur. The controller pre-establishes the deterministic phase relationship by selecting which stages receive active periodic binary signals versus steady state signals, ensuring that when mode transitions happen, the phase relationships remain predictable and stable without requiring real-time adjustment during the transition itself.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements parameter changes by dynamically adjusting the mode input parameters of different phase signal generation stages. The controller changes the state of mode inputs (switching between steady state signals and active periodic binary signals) to control whether stages contribute to 2^n phase signals or 2^(n-1) phase signals. This parameter adjustment allows seamless mode transitions while maintaining deterministic phase relationships, as the changes are made in a controlled manner rather than causing abrupt phase shifts.

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If the system uses multiple phase signal generation stages to generate 2^n phase signals, then the signal generation capability is improved, but the device complexity and power consumption increase

Engineering Contradiction:
Improvemulti-phase signal generation capabilityVSAvoidpower consumption
Core Design Contradiction:
Adaptability or versatilityVSUse of energy by moving object

Solution Approach 1:

The patent applies dynamics by making the operation of phase signal generation stages configurable and adaptable. The controller dynamically enables or disables specific stages based on the required mode, allowing the system to transition between generating 2^n phase signals (all stages active) and 2^(n-1) phase signals (half stages active with steady state inputs). This dynamic control allows the system to consume less power when full 2^n phase capability is not needed, while maintaining the capability when required.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent implements discarding and recovering by selectively deactivating certain phase signal generation stages when operating in 2^(n-1) mode. Stages that would generate redundant phase signals are discarded from active operation by providing them with steady state signals instead of active periodic binary signals. When full 2^n mode is needed, these stages are recovered and activated again. This selective discarding reduces power consumption during lower-mode operation while preserving full capability when needed.

Inventive Principle:
Principle #34Discarding and recovering

3Productivity

If the system transitions between modes in real time, then the productivity and responsiveness are improved, but the load changes on PLL circuits cause settling delays that hinder fast transitions

Engineering Contradiction:
Improvemode transition speedVSAvoidPLL settling time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent applies preliminary action by pre-configuring the phase signal generation stages with mode inputs that can be set to specific states before mode transitions occur. The controller pre-establishes the deterministic phase relationship by selecting which stages receive active periodic binary signals versus steady state signals, ensuring that when mode transitions happen, the phase relationships remain predictable and stable without requiring real-time adjustment during the transition itself.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements parameter changes by dynamically adjusting the mode input parameters of different phase signal generation stages. The controller changes the state of mode inputs (switching between steady state signals and active periodic binary signals) to control whether stages contribute to 2^n phase signals or 2^(n-1) phase signals. This parameter adjustment allows seamless mode transitions while maintaining deterministic phase relationships, as the changes are made in a controlled manner rather than causing abrupt phase shifts.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11782475B2Multi-phase signal generation
Publication Date: 2023.10.10 HUAWEI TECH CO LTD
  • US11782475B2 patent drawing
  • US11782475B2 patent drawing
  • US11782475B2 patent drawing

AI summary

The disclosure relates to technology for generating multi-phase signals. An apparatus includes 2{circumflex over ( )}n phase signal generation stages. The apparatus also includes a controller configured to provide a mode input of each of the 2{circumflex over ( )}n stages with an active periodic binary signal with remaining inputs of each of the 2{circumflex over ( )}n stages provided with another periodic binary signal to collectively generate a 2{circumflex over ( )}n phase signal in a first mode. The controller is further configured to provide the mode input of each of 2{circumflex over ( )}(n−1) odd stages with a first steady state signal and the mode input of each of 2{circumflex over ( )}(n−1) even stages with a second steady state signal with remaining inputs of each of the 2{circumflex over ( )}n stages provided with the same periodic binary signal as in the first mode to cause either the 2{circumflex over ( )}(n−1) odd stages or the 2{circumflex over ( )}(n−1) even stages to collectively generate a 2{circumflex over ( )}(n−1) phase signal in a second mode.