Multiphase Clock Distribution Circuit for Low-Power Skew Reduction
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Solution Overview
Problem
Semiconductor clock distribution circuits face challenges with high power consumption and skew issues during the transmission of external clock signals to internal circuit configurations.
Innovation Solution
A clock distribution circuit is designed with a global distribution circuit that divides external clock signals into first divided multiphase clock signals and a reference clock signal, which is then used by local distribution circuits to generate second divided multiphase clock signals, reducing power consumption and skew by optimizing signal distribution across input/output terminals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If external clock signals are distributed to all input/output terminals through a single clock distribution circuit, then clock signal coverage is complete, but power consumption increases and skew problems occur
Solution Approach 1:
The clock distribution circuit is divided into a global distribution circuit and multiple local distribution circuits. The global distribution circuit divides external clock signals into first divided multiphase clock signals and distributes them to respective local distribution circuits. Each local distribution circuit then generates second divided multiphase clock signals locally and distributes them to its corresponding input/output terminals. This segmentation reduces the transmission distance for each clock signal segment, lowering power consumption while maintaining complete coverage.
2Device complexity
If external clock signals are transmitted over long distances in a single phase, then signal distribution is simple, but skew problems occur
Solution Approach 1:
The clock signal transmission path is segmented into global and local distribution stages. The global distribution circuit performs initial division to create multiple phases, and each local distribution circuit performs further division locally. This multi-stage segmentation allows each segment to be optimized for its specific transmission distance, reducing cumulative skew while maintaining manageable complexity at each stage.
Solution Approach 2:
The patent changes the phase parameter of clock signals through multiple division stages. The global distribution circuit divides external clock signals into first divided multiphase clock signals with different phases, and local distribution circuits further divide these into second divided multiphase clock signals. This parameter transformation allows clock signals to reach distant terminals with reduced skew by utilizing phase differences to compensate for transmission delays.
3Reliability
If clock signals are divided into multiple phases for distribution, then skew is reduced, but circuit complexity increases
Solution Approach 1:
The circuit is segmented into global and local distribution units, with each unit containing division circuits. The global distribution circuit handles the initial phase division, and local distribution circuits handle further division. This segmentation distributes the complexity across multiple simpler units rather than requiring one complex circuit, making the overall system more manageable while achieving reduced skew through multiple phases.
Data Source
AI summary
Devices for reducing power consumption and skew for transmission of signals in a clock distribution circuit are described. A global distribution circuit is configured to divide external clock signals to generate first divided multiphase clock signals and divide one of the first divided multiphase clock signals to generate a reference clock signal. A local distribution circuit is configured to generate second divided multiphase clock signals according to a portion of the first divided multiphase clock signals and the reference clock signal.