Multiphase Clock Circuit for Uniform Phase Spacing
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Solution Overview
Problem
Conventional multiphase clock signal generating circuits are limited by RC charge and discharge time, and circuit process drift, resulting in non-uniform phase differences between adjacent clock signals, which affects the accuracy of eye diagrams.
Innovation Solution
A multi-phase clock signal generating circuit comprising a charge pump, a delay circuit with a delay chain of delay units, and a phase selecting circuit, which generates control voltages and candidate clock signals to produce output clock signals with more uniform phase distribution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a phase interpolation circuit is used to generate multi-phase clock signals, then the circuit can produce multiple clock signals with different phases, but the phase differences between adjacent clock signals are non-uniform due to RC charge and discharge time limitations and circuit process drift
Solution Approach 1:
The delay circuit is divided into multiple delay units (first delay unit, second delay unit, etc.) that can be independently controlled. Each delay unit processes a portion of the clock signal phase adjustment, allowing precise control over the phase of each output clock signal. This segmentation enables uniform phase distribution by independently optimizing each phase interval.
Solution Approach 2:
The invention changes the delay parameters of individual delay units based on detected phase differences. The control circuit adjusts the delay amount of each delay unit dynamically to compensate for non-uniformities, ensuring that the phase difference between adjacent output clock signals becomes uniform despite variations in circuit characteristics.
2Productivity
If conventional phase interpolation circuits are used, then multi-phase clock signals can be generated, but the accuracy of eye diagrams is degraded due to non-uniform phase distribution
Solution Approach 1:
The invention implements a feedback mechanism where the phase differences between adjacent output clock signals are detected and used to control the delay units. The detection circuit measures actual phase differences, and the control circuit uses this information to adjust delay unit parameters, creating a closed-loop system that ensures uniform phase distribution for accurate eye diagram generation.
Solution Approach 2:
The delay units are designed to be dynamically adjustable rather than fixed. The control circuit can modify the delay characteristics of each delay unit in real-time based on detected phase uniformity requirements, enabling the system to adapt and maintain uniform phase distribution across varying operating conditions.
Data Source
AI summary
A multi-phase clock signal generating circuit, configured to generate a plurality of output clock signals with different phases, comprising: a charge pump, configured to generate a control voltage according to a reference clock signal and a target clock signal; a delay circuit, comprising a delay chain with a plurality of delay units, configured to generate a plurality of candidate clock signals and the target clock signal according to the control voltage; and a phase selecting circuit, configured to select at least two of the candidate clock signals as the output signals.