Multiphase Converter Fault Synchronization for Low Ripple Output

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Solution Overview

Problem

Existing stackable multiphase power converters experience significant ripple in output voltage and current, along with increased power loss when a phase encounters a fault, such as hardware malfunction or protection states, due to the continued operation of non-faulty phases based on their original sequence numbers.

Innovation Solution

A conversion control circuit that utilizes fault indication signals to disable faulty phases and adjust the activated phase number, allowing non-faulty phases to take over, thereby maintaining stable current sharing and reducing power loss.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If non-faulty phases continue to operate based on original phase sequence numbers when a fault occurs, then the power converter maintains continuous operation, but significant ripple appears in output voltage and current and power loss increases

Engineering Contradiction:
Improvecontinuous operationVSAvoidoutput ripple and power loss
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent implements dynamic phase sequence adjustment by detecting fault conditions and reconfiguring the phase sequences of non-faulty phases in real-time. When a fault is detected in any phase, the control system dynamically modifies the switching sequences of remaining operational phases to maintain balanced current distribution and minimize output ripple, thereby resolving the contradiction between continuous operation and output quality.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the operational parameters (phase sequence numbers and switching timing) of non-faulty phases based on fault conditions. By adjusting these parameters dynamically, the system maintains stable output characteristics even when phases are disabled, eliminating the harmful effects of fixed phase sequencing under fault conditions.

Inventive Principle:
Principle #35Parameter changes

2Loss of energy

If the number of activated phases is reduced during light load conditions, then power consumption is saved, but current sharing stability may be affected

Engineering Contradiction:
Improvepower consumptionVSAvoidcurrent sharing stability
Core Design Contradiction:
Loss of energyVSStability of the object's composition

Solution Approach 1:

The patent implements dynamic phase configuration that adapts to load conditions. During light load, fewer phases are activated to reduce power consumption, while during heavy load, more phases are activated to maintain current sharing stability. The system dynamically transitions between different phase configurations based on real-time load detection, resolving the contradiction between energy efficiency and stability.

Inventive Principle:
Principle #15Dynamics

3Power

If more phases are activated to handle high load currents, then power conversion capability is improved, but power loss increases

Engineering Contradiction:
Improvepower conversion capabilityVSAvoidpower loss
Core Design Contradiction:
PowerVSLoss of energy

Solution Approach 1:

The patent implements dynamic phase activation that activates additional phases only when load current exceeds threshold levels. During high load conditions, more phases are activated to distribute current and improve power conversion capability. During normal or light load, fewer phases remain active to minimize power loss, thus resolving the contradiction between power capability and energy efficiency.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS20250385597A1Conversion control circuit and method for use in stackable multiphase power converter
Publication Date: 2025.12.18 RICHTEK TECH
  • US20250385597A1 patent drawing
  • US20250385597A1 patent drawing
  • US20250385597A1 patent drawing

AI summary

A conversion control circuit for controlling a stackable multiphase power converter, wherein the stackable multiphase power converter includes plural stackable sub-converters, each of which includes a power stage circuit and a conversion control circuit. The conversion control circuit includes: a synchronization terminal, through which a synchronization signal is transmitted and received among the plurality of synchronization terminals of the plural conversion control circuits; and a fault indication signal or status, where plural pulses of the synchronization signal have a fault indication status. When at least one of the plural stackable sub-converters experiences a fault, the fault indication signal or status indicates and controls the conversion control circuit to enter a fault operation. The fault operation includes: the fault indication signal or the fault indication status disables a faulty one of the plural stackable sub-converters, and one of the non-faulty ones among the plural stackable sub-converters takes over.